@@ -68,8 +68,8 @@ typedef struct
6868 * | | |1110 = 3 CK cycles.
6969 * | | |1111 = 4 CK cycles.
7070 * | | |Others = Reserved.
71- * | | |Note: This field must be set to the same value as “ I
72- * | | |initial Latency in HyperRAM’s Configuration Register 0.
71+ * | | |Note: This field must be set to the same value as I
72+ * | | |initial Latency in HyperRAMs Configuration Register 0.
7373 * |[7:6] |CSH |Chip Select Hold Time After CK Falling Edge
7474 * | | |This field indicates the hold time between the last CK falling edge and chip select
7575 * | | |00 = 0.5 HCLK cycles.
@@ -84,14 +84,14 @@ typedef struct
8484 * | | |0011 = 4 HCLK cycles.
8585 * | | |...
8686 * | | |1111 = 16 HCLK cycles.
87- * | | |Note : This field must meet the HyperRAM device’s specification of tCSHI.
87+ * | | |Note : This field must meet the HyperRAM devices specification of tCSHI.
8888 * |[13:12] |BGSIZE |Burst Group Size
8989 * | | |This field indicates the burst length on the Hyper Bus transaction
9090 * | | |00 = 128 Bytes.
9191 * | | |01 = 64 Bytes.
9292 * | | |10 = 16 Bytes.
9393 * | | |11 = 32 Bytes.
94- * | | |Note : This field must be set to the same value as “ Burst Length” in HyperRAM’s Configuration Regsiter 0.
94+ * | | |Note : This field must be set to the same value as Burst Length in HyperRAMs Configuration Regsiter 0.
9595 * |[14] |ENDIAN |Endian Condition on the Hyper Bus Data Pipe
9696 * | | |0 = Little-Endian.
9797 * | | | Byte A = Bits[7:0] of a 16-Bit ..........word
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