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Commit 7876a65

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jeromecoutantCruz Monrreal II
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STM32L476 / STM32L486 alignment
1 parent 5ae13f9 commit 7876a65

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7 files changed

+55
-12
lines changed

7 files changed

+55
-12
lines changed

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -60,11 +60,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
6060

6161
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
6262
}
63-
63+
6464
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1
6565
.ANY (+RW +ZI)
6666
}
67-
67+
6868
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
6969
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
7070
.ANY (+RW +ZI)

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ STACK_SIZE = MBED_BOOT_STACK_SIZE;
1616

1717
/* Linker script to configure memory regions. */
1818
MEMORY
19-
{
19+
{
2020
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
2121
SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
2222
SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
@@ -26,7 +26,7 @@ MEMORY
2626
* with other linker script that defines memory regions FLASH and RAM.
2727
* It references following symbols, which must be defined in code:
2828
* Reset_Handler : Entry of reset handler
29-
*
29+
*
3030
* It defines following symbols, which code can use without definition:
3131
* __exidx_start
3232
* __exidx_end
@@ -93,7 +93,7 @@ SECTIONS
9393

9494
__etext = .;
9595
_sidata = .;
96-
96+
9797
.crash_data_ram :
9898
{
9999
. = ALIGN(8);
@@ -104,7 +104,7 @@ SECTIONS
104104
. += M_CRASH_DATA_RAM_SIZE;
105105
. = ALIGN(8);
106106
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
107-
} > SRAM1
107+
} > SRAM1
108108

109109
.data : AT (__etext)
110110
{

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@ void SystemInit(void)
9797
#ifdef VECT_TAB_SRAM
9898
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
9999
#else
100-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
100+
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
101101
#endif
102102

103103
}

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,13 @@
3636
#define MBED_APP_SIZE 0x100000
3737
#endif
3838

39+
#define MBED_RAM_START 0x20000000
40+
#define MBED_RAM_SIZE 0x00018000
41+
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
42+
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
43+
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
44+
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
45+
3946
#if !defined(MBED_BOOT_STACK_SIZE)
4047
#define MBED_BOOT_STACK_SIZE 0x400
4148
#endif
@@ -51,15 +58,20 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
5158
.ANY (+RO)
5259
}
5360

54-
RW_IRAM1 0x20000000 0x00018000-Stack_Size { ; RW data 96k L4-SRAM1
61+
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
62+
}
63+
64+
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1
5565
.ANY (+RW +ZI)
5666
}
67+
5768
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
5869
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
5970
.ANY (+RW +ZI)
6071
}
6172

62-
ARM_LIB_STACK (0x20000000+0x00018000) EMPTY -Stack_Size { ; stack
73+
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
6374
}
75+
6476
}
6577

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,8 @@
66
#define MBED_APP_SIZE 1024k
77
#endif
88

9+
M_CRASH_DATA_RAM_SIZE = 0x100;
10+
911
#if !defined(MBED_BOOT_STACK_SIZE)
1012
#define MBED_BOOT_STACK_SIZE 0x400
1113
#endif
@@ -15,7 +17,7 @@ STACK_SIZE = MBED_BOOT_STACK_SIZE;
1517
/* Linker script to configure memory regions. */
1618
MEMORY
1719
{
18-
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
20+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
1921
SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
2022
SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
2123
}
@@ -92,6 +94,18 @@ SECTIONS
9294
__etext = .;
9395
_sidata = .;
9496

97+
.crash_data_ram :
98+
{
99+
. = ALIGN(8);
100+
__CRASH_DATA_RAM__ = .;
101+
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
102+
KEEP(*(.keep.crash_data_ram))
103+
*(.m_crash_data_ram) /* This is a user defined section */
104+
. += M_CRASH_DATA_RAM_SIZE;
105+
. = ALIGN(8);
106+
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
107+
} > SRAM1
108+
95109
.data : AT (__etext)
96110
{
97111
__data_start__ = .;

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2-
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }
2+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
33

44
/* [ROM = 1024kb = 0x100000] */
55
define symbol __intvec_start__ = MBED_APP_START;
@@ -12,15 +12,22 @@ define symbol __NVIC_start__ = 0x10000000;
1212
define symbol __NVIC_end__ = 0x10000187;
1313
define symbol __region_SRAM2_start__ = 0x10000188;
1414
define symbol __region_SRAM2_end__ = 0x10007FFF;
15-
define symbol __region_SRAM1_start__ = 0x20000000;
15+
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
16+
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
17+
define symbol __region_SRAM1_start__ = 0x20000100;
1618
define symbol __region_SRAM1_end__ = 0x20017FFF;
1719

1820
/* Memory regions */
1921
define memory mem with size = 4G;
2022
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
2123
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
24+
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
2225
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
2326

27+
/* Define Crash Data Symbols */
28+
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
29+
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
30+
2431
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
2532
define symbol MBED_BOOT_STACK_SIZE = 0x400;
2633
}

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,16 @@ struct trng_s {
5858
RNG_HandleTypeDef handle;
5959
};
6060

61+
struct qspi_s {
62+
QSPI_HandleTypeDef handle;
63+
PinName io0;
64+
PinName io1;
65+
PinName io2;
66+
PinName io3;
67+
PinName sclk;
68+
PinName ssel;
69+
};
70+
6171
#include "common_objects.h"
6272

6373
#ifdef __cplusplus

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