Dual Bank Flash support update

Author: jeromecoutant

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/flash_data.h

@@ -43,7 +43,7 @@
 //   1) enable the FLASH_DUAL_BANK configuration using a json file
 //   2) enable the nDBANK option byte using STLink-Utility software
 //=====================================================================
-#ifdef MBED_CONF_TARGET_FLASH_DUAL_BANK
+#if MBED_CONF_TARGET_FLASH_DUAL_BANK
 
 #define ADDR_FLASH_SECTOR_0     ((uint32_t)0x08000000) /* Base address of Sector 0, 16 Kbytes */
 #define ADDR_FLASH_SECTOR_1     ((uint32_t)0x08004000) /* Base address of Sector 1, 16 Kbytes */

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/flash_data.h

@@ -43,7 +43,7 @@
 //   1) enable the FLASH_DUAL_BANK configuration using a json file
 //   2) enable the nDBANK option byte using STLink-Utility software
 //=====================================================================
-#ifdef MBED_CONF_TARGET_FLASH_DUAL_BANK
+#if MBED_CONF_TARGET_FLASH_DUAL_BANK
 
 #define ADDR_FLASH_SECTOR_0     ((uint32_t)0x08000000) /* Base address of Sector 0, 16 Kbytes */
 #define ADDR_FLASH_SECTOR_1     ((uint32_t)0x08004000) /* Base address of Sector 1, 16 Kbytes */

targets/TARGET_STM/TARGET_STM32F7/flash_api.c

@@ -48,7 +48,7 @@ int32_t flash_init(flash_t *obj)
     HAL_FLASHEx_OBGetConfig(&OBInit);
     /* Allow Access to option bytes sector */
     HAL_FLASH_OB_Lock();
-#ifdef MBED_CONF_TARGET_FLASH_DUAL_BANK
+#if MBED_CONF_TARGET_FLASH_DUAL_BANK
     if ((OBInit.USERConfig & OB_NDBANK_SINGLE_BANK) == OB_NDBANK_SINGLE_BANK)
     {
         error("The Dual Bank mode option byte (nDBANK) must be enabled (box unchecked)\n");
@@ -62,7 +62,7 @@ int32_t flash_init(flash_t *obj)
     }
 #endif
 #else // Devices supporting Single Bank only
-#ifdef MBED_CONF_TARGET_FLASH_DUAL_BANK
+#if MBED_CONF_TARGET_FLASH_DUAL_BANK
 #error "The Dual Bank configuration is not supported on this device."
 #endif
 #endif
@@ -207,7 +207,7 @@ static uint32_t GetSector(uint32_t address)
 {
     uint32_t sector = 0;
     uint32_t tmp = address - ADDR_FLASH_SECTOR_0;
-#if defined(MBED_CONF_TARGET_FLASH_DUAL_BANK) && defined(FLASH_OPTCR_nDBANK)
+#if (MBED_CONF_TARGET_FLASH_DUAL_BANK) && defined(FLASH_OPTCR_nDBANK)
     if (address < ADDR_FLASH_SECTOR_4) { // Sectors 0 to 3
         sector += tmp >> 14;
     } else if (address < ADDR_FLASH_SECTOR_5) { // Sector 4
@@ -244,7 +244,7 @@ static uint32_t GetSector(uint32_t address)
 static uint32_t GetSectorSize(uint32_t Sector)
 {
     uint32_t sectorsize = 0x00;
-#if defined(MBED_CONF_TARGET_FLASH_DUAL_BANK) && defined(FLASH_OPTCR_nDBANK)
+#if (MBED_CONF_TARGET_FLASH_DUAL_BANK) && defined(FLASH_OPTCR_nDBANK)
     if ((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) ||\
         (Sector == FLASH_SECTOR_2) || (Sector == FLASH_SECTOR_3) ||\
         (Sector == FLASH_SECTOR_12) || (Sector == FLASH_SECTOR_13) ||\

targets/targets.json

@@ -1435,6 +1435,10 @@
         "core": "Cortex-M7FD",
         "extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI", "STM_EMAC"],
         "config": {
+            "flash_dual_bank": {
+                "help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
+                "value": "0"
+            },
             "d11_configuration": {
                 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
                 "value": "PA_7",
@@ -1936,6 +1940,10 @@
         "extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI", "STM_EMAC"],
         "supported_form_factors": ["ARDUINO"],
         "config": {
+            "flash_dual_bank": {
+                "help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
+                "value": "0"
+            },
             "clock_source": {
                 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
                 "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",