STM32: check for UART ongoing transfers before entering deepsleep

As suggested by Russ Butler in mbed-os issue #7328, and until there is an
implementation of mbed-os issue #4408, we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).

In case a transfer is ongoing, we're not entering deep sleep and
return immediately.

Author: LMESTM

targets/TARGET_STM/TARGET_STM32F0/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32f0xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32F1/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32f1xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32F2/device.h

@@ -33,5 +33,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32f2xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32F3/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32f3xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32F4/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32f4xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32F7/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32f7xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32L0/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32l0xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32L1/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32l1xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/TARGET_STM32L4/device.h

@@ -36,5 +36,7 @@
 #define DEVICE_ID_LENGTH       24
 
 #include "objects.h"
+/*  WORKAROUND waiting for mbed-os issue 4408 to be addressed */
+#include "stm32l4xx_ll_usart.h"
 
 #endif

targets/TARGET_STM/serial_api.c

@@ -660,4 +660,105 @@ int8_t get_uart_index(UARTName uart_name)
     return -1;
 }
 
+/*  Function to protect deep sleep while a seral Tx is ongoing on not complete
+ *  yet. Returns 1 if there is at least 1 serial instance with ongoing ransfer
+ *  0 otherwise.
+ */
+int serial_IsTxOngoing(void) {
+    int TxOngoing = 0;
+
+#if defined(USART1_BASE)
+    if (LL_USART_IsEnabled(USART1) && !LL_USART_IsActiveFlag_TC(USART1)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART2_BASE)
+    if (LL_USART_IsEnabled(USART2) && !LL_USART_IsActiveFlag_TC(USART2)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART3_BASE)
+    if (LL_USART_IsEnabled(USART3) && !LL_USART_IsActiveFlag_TC(USART3)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(UART4_BASE)
+    if (LL_USART_IsEnabled(UART4) && !LL_USART_IsActiveFlag_TC(UART4)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART4_BASE)
+    if (LL_USART_IsEnabled(USART4) && !LL_USART_IsActiveFlag_TC(USART4)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(UART5_BASE)
+    if (LL_USART_IsEnabled(UART5) && !LL_USART_IsActiveFlag_TC(UART5)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART5_BASE)
+    if (LL_USART_IsEnabled(USART5) && !LL_USART_IsActiveFlag_TC(USART5)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART6_BASE)
+    if (LL_USART_IsEnabled(USART6) && !LL_USART_IsActiveFlag_TC(USART6)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(UART7_BASE)
+    if (LL_USART_IsEnabled(UART7) && !LL_USART_IsActiveFlag_TC(UART7)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART7_BASE)
+    if (LL_USART_IsEnabled(USART7) && !LL_USART_IsActiveFlag_TC(USART7)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(UART8_BASE)
+    if (LL_USART_IsEnabled(UART8) && !LL_USART_IsActiveFlag_TC(UART8)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(USART8_BASE)
+    if (LL_USART_IsEnabled(USART8) && !LL_USART_IsActiveFlag_TC(USART8)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(UART9_BASE)
+    if (LL_USART_IsEnabled(UART9) && !LL_USART_IsActiveFlag_TC(UART9)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(UART10_BASE)
+    if (LL_USART_IsEnabled(UART10) && !LL_USART_IsActiveFlag_TC(UART10)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+#if defined(LPUART1_BASE)
+    if (LL_USART_IsEnabled(LPUART1) && !LL_USART_IsActiveFlag_TC(LPUART1)) {
+        TxOngoing |= 1;
+    }
+#endif
+
+    /*  If Tx is ongoing, then transfer is */
+    return TxOngoing;
+}
+
 #endif /* DEVICE_SERIAL */