STM32 : removed unused QSPI pin names

Author: jeromecoutant

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h

@@ -307,14 +307,6 @@ typedef enum {
     SYS_WKUP2 = PC_0,
     SYS_WKUP3 = PC_1,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PD_11,
-    QSPI1_IO1 = PD_12,
-    QSPI1_IO2 = PE_2,
-    QSPI1_IO3 = PD_13,
-    QSPI1_SCK = PB_2,
-    QSPI1_CSN = PB_6,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h

@@ -306,14 +306,6 @@ typedef enum {
     SYS_WKUP2 = PC_0,
     SYS_WKUP3 = PC_1,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PD_11,
-    QSPI1_IO1 = PD_12,
-    QSPI1_IO2 = PE_2,
-    QSPI1_IO3 = PD_13,
-    QSPI1_SCK = PB_2,
-    QSPI1_CSN = PB_6,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h

@@ -325,14 +325,6 @@ typedef enum {
     SYS_WKUP0 = PA_0,
     SYS_WKUP1 = PC_13,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PD_11,
-    QSPI1_IO1 = PD_12,
-    QSPI1_IO2 = PE_2,
-    QSPI1_IO3 = PD_13,
-    QSPI1_SCK = PB_2,
-    QSPI1_CSN = PB_6,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h

@@ -354,14 +354,6 @@ typedef enum {
     SYS_WKUP3 = PC_1,
     SYS_WKUP4 = PC_13,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PD_11,
-    QSPI1_IO1 = PD_12,
-    QSPI1_IO2 = PE_2,
-    QSPI1_IO3 = PD_13,
-    QSPI1_SCK = PB_2,
-    QSPI1_CSN = PB_6,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h

@@ -359,14 +359,6 @@ typedef enum {
     SYS_WKUP3 = PC_1,
     SYS_WKUP4 = PC_13,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PD_11,
-    QSPI1_IO1 = PD_12,
-    QSPI1_IO2 = PE_2,
-    QSPI1_IO3 = PD_13,
-    QSPI1_SCK = PB_2,
-    QSPI1_CSN = PB_6,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PinNames.h

@@ -159,15 +159,6 @@ typedef enum {
     SYS_WKUP1 = PA_0,
     SYS_WKUP4 = PA_2,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PB_1,
-    QSPI1_IO1 = PB_0,
-    QSPI1_IO2 = PA_7,
-    QSPI1_IO3 = PA_6,
-    QSPI1_SCK = PA_3,
-    QSPI1_CSN = PA_2,
-
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h

@@ -236,14 +236,6 @@ typedef enum {
     SYS_WKUP2 = PC_13,
     SYS_WKUP4 = PA_2,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PB_1,
-    QSPI1_IO1 = PB_0,
-    QSPI1_IO2 = PA_7,
-    QSPI1_IO3 = PA_6,
-    QSPI1_SCK = PB_10,
-    QSPI1_CSN = PB_11,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h

@@ -258,21 +258,13 @@ typedef enum {
     SYS_WKUP4 = PA_2,
     SYS_WKUP5 = PC_5,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PE_12,
-    QSPI1_IO1 = PE_13,
-    QSPI1_IO2 = PE_14,
-    QSPI1_IO3 = PE_15,
-    QSPI1_SCK = PE_10,
-    QSPI1_CSN = PE_11,
-
     /**** QSPI FLASH pins ****/
-    QSPI_FLASH1_IO0 = QSPI1_IO0,
-    QSPI_FLASH1_IO1 = QSPI1_IO1,
-    QSPI_FLASH1_IO2 = QSPI1_IO2,
-    QSPI_FLASH1_IO3 = QSPI1_IO3,
-    QSPI_FLASH1_SCK = QSPI1_SCK,
-    QSPI_FLASH1_CSN = QSPI1_CSN,
+    QSPI_FLASH1_IO0 = PE_12,
+    QSPI_FLASH1_IO1 = PE_13,
+    QSPI_FLASH1_IO2 = PE_14,
+    QSPI_FLASH1_IO3 = PE_15,
+    QSPI_FLASH1_SCK = PE_10,
+    QSPI_FLASH1_CSN = PE_11,
 
     // Not connected
     NC = (int)0xFFFFFFFF

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h

@@ -317,14 +317,6 @@ typedef enum {
     SYS_WKUP4 = PA_2,
     SYS_WKUP5 = PC_5,
 
-    /**** QSPI pins ****/
-    QSPI1_IO0 = PE_12,
-    QSPI1_IO1 = PB_0,
-    QSPI1_IO2 = PE_14,
-    QSPI1_IO3 = PE_15,
-    QSPI1_SCK = PB_10,
-    QSPI1_CSN = PA_2,
-
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;