@@ -42,18 +42,17 @@ void trng_init(trng_t *obj)
42
42
error ("Only 1 RNG instance supported\r\n" );
43
43
}
44
44
45
- #if !defined(TARGET_STM32WB )
46
- /* Because M0 core of WB also needs RG RNG is already clocked by default */
47
- #if defined(RCC_PERIPHCLK_RNG )
45
+ #if defined(RCC_PERIPHCLK_RNG ) /* STM32L4 / STM32H7 / STM32WB */
46
+
47
+ #if defined(TARGET_STM32WB )
48
+ /* No need to reconfigure RngClockSelection as RNG is already clocked by M0 */
49
+
50
+ #elif defined(TARGET_STM32H7 )
48
51
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct ;
49
52
50
53
/*Select PLLQ output as RNG clock source */
51
54
PeriphClkInitStruct .PeriphClockSelection = RCC_PERIPHCLK_RNG ;
52
- #if ((CLOCK_SOURCE ) & USE_PLL_MSI )
53
- PeriphClkInitStruct .RngClockSelection = RCC_RNGCLKSOURCE_MSI ;
54
- #else
55
55
PeriphClkInitStruct .RngClockSelection = RCC_RNGCLKSOURCE_PLL ;
56
- #endif
57
56
#if defined(DUAL_CORE )
58
57
uint32_t timeout = HSEM_TIMEOUT ;
59
58
while (LL_HSEM_1StepLock (HSEM , CFG_HW_RCC_SEMID ) && (-- timeout != 0 )) {
@@ -65,8 +64,33 @@ void trng_init(trng_t *obj)
65
64
#if defined(DUAL_CORE )
66
65
LL_HSEM_ReleaseLock (HSEM , CFG_HW_RCC_SEMID , HSEM_CR_COREID_CURRENT );
67
66
#endif /* DUAL_CORE */
67
+
68
+ #elif defined(TARGET_STM32L4 )
69
+ /* RNG and USB clocks have the same source, so the common source selection could be already done by USB */
70
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct ;
71
+
72
+ PeriphClkInitStruct .PeriphClockSelection = RCC_PERIPHCLK_RNG ;
73
+
74
+ if (__HAL_RCC_GET_FLAG (RCC_FLAG_MSIRDY )) {
75
+ /* MSI clock is enabled, MSI selected as RNG clock source if not alredy done */
76
+ if (__HAL_RCC_GET_RNG_SOURCE () != RCC_RNGCLKSOURCE_MSI ) {
77
+ PeriphClkInitStruct .RngClockSelection = RCC_RNGCLKSOURCE_MSI ;
78
+ if (HAL_RCCEx_PeriphCLKConfig (& PeriphClkInitStruct ) != HAL_OK ) {
79
+ error ("RNG clock configuration error\n" );
80
+ }
81
+ }
82
+ } else {
83
+ /* MSI clock is not enabled, PLL selected as RNG clock source */
84
+ PeriphClkInitStruct .RngClockSelection = RCC_RNGCLKSOURCE_PLL ;
85
+ if (HAL_RCCEx_PeriphCLKConfig (& PeriphClkInitStruct ) != HAL_OK ) {
86
+ error ("RNG clock configuration error\n" );
87
+ }
88
+ }
89
+
90
+ #else
91
+ #error ("RNG clock not configured");
68
92
#endif
69
- #endif //! defined(TARGET_STM32WB)
93
+ #endif /* defined(RCC_PERIPHCLK_RNG) */
70
94
71
95
/* RNG Peripheral clock enable */
72
96
__HAL_RCC_RNG_CLK_ENABLE ();
0 commit comments