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1 parent 5a34a2b commit 7e99a75Copy full SHA for 7e99a75
targets/TARGET_Maxim/TARGET_MAX32620/sleep.c
@@ -32,14 +32,12 @@
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*/
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#include "sleep_api.h"
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-#include "cmsis.h"
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#include "pwrman_regs.h"
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#include "pwrseq_regs.h"
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#include "clkman_regs.h"
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#include "ioman_regs.h"
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#include "rtc_regs.h"
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#include "usb_regs.h"
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-#include "wait_api.h"
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#define REVISION_A3 2
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#define REVISION_A4 3
@@ -178,7 +176,7 @@ void deepsleep(void)
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MXC_PWRSEQ->reg1 |= MXC_F_PWRSEQ_REG1_PWR_MBUS_GATE;
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// Dummy read to make sure SSB writes are complete
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- MXC_PWRSEQ->reg0;
+ MXC_PWRSEQ->reg0 = MXC_PWRSEQ->reg0;
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if (part_rev == REVISION_A4) {
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// Note: ARM deep-sleep requires a specific sequence to clear event latches,
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