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Commit 80f0a37

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author
Tauno Magnusson
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Updated to enable HSI48 Clock also for USBDEVICE define in targets.json. Also added so that the CK48 Clock Mux selects HSI48 for both RNG and USB. Without these the RNG/USB will be clocked at PLLQ (170 MHz) and not work.
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targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121
* | 3- USE_PLL_HSI (internal 16 MHz)
2222
*-----------------------------------------------------------------
2323
* SYSCLK(MHz) | 160 (default configuration) / 170 (CAN disabled)
24-
* USB capable | NO
24+
* USB capable | YES (Add "device_has_add": ["USBDEVICE"], to the NUCLEO_G431KB entry in targets.json to enable USB)
2525
*-----------------------------------------------------------------
2626
*/
2727

@@ -86,6 +86,7 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
8686
{
8787
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8888
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
89+
RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
8990

9091
#if HSE_VALUE != 24000000
9192
#error Unsupported externall clock value, check HSE_VALUE define
@@ -111,14 +112,24 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
111112
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
112113
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
113114
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
114-
#if defined(DEVICE_TRNG)
115+
#if defined(DEVICE_TRNG) || defined(DEVICE_USBDEVICE)
116+
// Enable the HSI48 Clock (Can be used as a clocksource by CRS, RNG and USB)
115117
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
116118
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
117119
#endif
118120
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
119121
return 0; // FAIL
120122
}
121123

124+
#if defined(DEVICE_TRNG) || defined(DEVICE_USBDEVICE)
125+
// Connect the HSI48 Clock to drive the USB & RNG Clocks @ 48 MHz (CK48 Clock Mux)
126+
RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
127+
RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
128+
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) {
129+
return 0; // FAIL
130+
}
131+
#endif
132+
122133
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
123134
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
124135
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
@@ -141,6 +152,7 @@ uint8_t SetSysClock_PLL_HSI(void)
141152
{
142153
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
143154
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
155+
RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
144156

145157
/* Configure the main internal regulator output voltage */
146158
__HAL_RCC_PWR_CLK_ENABLE();
@@ -163,14 +175,24 @@ uint8_t SetSysClock_PLL_HSI(void)
163175
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
164176
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
165177
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
166-
#if defined(DEVICE_TRNG)
178+
#if defined(DEVICE_TRNG) || defined(DEVICE_USBDEVICE)
179+
// Enable the HSI48 Clock (Can be used as a clocksource by CRS, RNG and USB)
167180
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
168181
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
169182
#endif
170183
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
171184
return 0; // FAIL
172185
}
173186

187+
#if defined(DEVICE_TRNG) || defined(DEVICE_USBDEVICE)
188+
// Connect the HSI48 Clock to drive the USB & RNG Clocks @ 48 MHz (CK48 Clock Mux)
189+
RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
190+
RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
191+
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) {
192+
return 0; // FAIL
193+
}
194+
#endif
195+
174196
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
175197
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
176198
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;

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