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/* mbed Microcontroller Library
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- * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved
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+ * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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+ #include <stdbool.h>
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#include "us_ticker_api.h"
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- #include "mbed_critical.h"
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+ #include "tmpm066_tmrb.h"
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+ #include "tmpm066_intifsd.h"
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- #define TMR16A_100US 0x960 // fsys = fc = 24MHz, Ttmra = 1/24us, 100us*24us = 2400 = 0x960
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- #define TMR16A_SYSCK ((uint32_t)0x00000001)
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- #define TMR16A_RUN ((uint32_t)0x00000001)
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- #define TMR16A_STOP ((uint32_t)0x00000000)
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- #define OVERFLOW_32BIT (0xFFFFFFFF / 0x64)
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+ #define MAX_TICK_16_BIT 0xFFFF
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- static uint8_t us_ticker_inited = 0 ; // Is ticker initialized yet?
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- static volatile uint32_t ticker_int_counter = 0 ; // Amount of overflows until user interrupt
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- static volatile uint32_t us_ticker = 0 ; // timer counter
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+ static bool us_ticker_inited = false; // Is ticker initialized yet?
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- void INT16A0_IRQHandler (void )
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+ void INTTB7_IRQHandler (void )
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{
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- us_ticker ++ ;
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-
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- if (us_ticker > OVERFLOW_32BIT ) {
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- us_ticker = 0 ;
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- }
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+ us_ticker_irq_handler ();
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}
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- void INT16A1_IRQHandler ( void )
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+ const ticker_info_t * us_ticker_get_info ( )
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{
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- us_ticker_irq_handler ();
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+ static const ticker_info_t info = {
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+ 3000000 , // 3MHz,
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+ 16 // 16 bit counter
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+ };
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+ return & info ;
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}
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// initialize us_ticker
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void us_ticker_init (void )
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{
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- // Enable clock supply to TA0
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- CG_SetFcPeriphA ( CG_FC_PERIPH_TMR16A , ENABLE );
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+ TMRB_InitTypeDef m_tmrb0 ;
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+
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if (us_ticker_inited ) {
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+ us_ticker_disable_interrupt ();
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return ;
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}
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- us_ticker_inited = 1 ;
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+ us_ticker_inited = true ;
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+ // TSB_TB7 using free-run
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+ m_tmrb0 .Mode = TMRB_INTERVAL_TIMER ;
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+ m_tmrb0 .ClkDiv = TMRB_CLK_DIV_8 ;
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+ m_tmrb0 .UpCntCtrl = TMRB_FREE_RUN ;
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+ m_tmrb0 .TrailingTiming = MAX_TICK_16_BIT ;
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+ m_tmrb0 .LeadingTiming = MAX_TICK_16_BIT ;
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+
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+ // Enable channel 0
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+ TMRB_Enable (TSB_TB7 );
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// Stops and clear count operation
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- TSB_T16A0 -> RUN = TMR16A_STOP ;
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- TSB_T16A0 -> CR = TMR16A_SYSCK ;
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- // Permits INTTA0 interrupt
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- NVIC_EnableIRQ ( INT16A0_IRQn );
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- // Match counter set to max value
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- TSB_T16A0 -> RG = TMR16A_100US ;
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- TSB_T16A0 -> RUN = TMR16A_RUN ;
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+ TMRB_SetRunState ( TSB_TB7 , TMRB_STOP ) ;
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+ // Mask All interrupts
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+ TMRB_SetINTMask ( TSB_TB7 , TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_MATCH_TRAILINGTIMING_INT | TMRB_MASK_OVERFLOW_INT );
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+ // Initialize timer
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+ TMRB_Init ( TSB_TB7 , & m_tmrb0 );
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+ // Starts TSB_TB7
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+ TMRB_SetRunState ( TSB_TB7 , TMRB_RUN ) ;
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}
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uint32_t us_ticker_read (void )
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us_ticker_init ();
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}
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- uint32_t tickerbefore = 0 ;
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- do {
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- tickerbefore = us_ticker ;
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- ret_val = (us_ticker * 100 );
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- } while (tickerbefore != us_ticker );
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+ ret_val = (uint32_t )TMRB_GetUpCntValue (TSB_TB7 );
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return ret_val ;
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}
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void us_ticker_set_interrupt (timestamp_t timestamp )
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{
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- uint32_t delta = 0 ;
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-
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- // Stops and clear count operation
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- TSB_T16A1 -> RUN = TMR16A_STOP ;
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- TSB_T16A1 -> CR = TMR16A_SYSCK ;
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- // Set the compare register
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- delta = (timestamp - us_ticker_read ());
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- TSB_T16A1 -> RG = delta ;
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- // Set Interrupt
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- NVIC_EnableIRQ (INT16A1_IRQn );
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- // Start TMR_TA1 timer
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- TSB_T16A1 -> RUN = TMR16A_RUN ;
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+ NVIC_DisableIRQ (INTTB7_IRQn );
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+ NVIC_ClearPendingIRQ (INTTB7_IRQn );
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+ TMRB_ChangeTrailingTiming (TSB_TB7 , timestamp );
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+ //Mask all Interrupts except trailing edge interrupt
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+ TMRB_SetINTMask (TSB_TB7 , TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_OVERFLOW_INT );
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+ NVIC_EnableIRQ (INTTB7_IRQn );
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}
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void us_ticker_fire_interrupt (void )
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{
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- NVIC_SetPendingIRQ (INT16A1_IRQn );
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+ NVIC_SetPendingIRQ (INTTB7_IRQn );
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+ NVIC_EnableIRQ (INTTB7_IRQn );
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}
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void us_ticker_disable_interrupt (void )
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{
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- NVIC_DisableIRQ (INT16A1_IRQn );
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+ // Mask All interrupts
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+ TMRB_SetINTMask (TSB_TB7 , TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_MATCH_TRAILINGTIMING_INT | TMRB_MASK_OVERFLOW_INT );
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+ // Also clear and disable interrupts by NVIC
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+ NVIC_ClearPendingIRQ (INTTB7_IRQn );
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+ NVIC_DisableIRQ (INTTB7_IRQn );
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}
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void us_ticker_clear_interrupt (void )
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{
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- //no flags to clear
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+ INTIFSD_ClearINTReq (INTIFSD_INT_SRC_TMRB_7_MDOVF );
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+ NVIC_ClearPendingIRQ (INTTB7_IRQn );
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}
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void us_ticker_free (void )
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{
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-
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+ TMRB_SetINTMask (TSB_TB7 , TMRB_MASK_MATCH_LEADINGTIMING_INT | TMRB_MASK_MATCH_TRAILINGTIMING_INT | TMRB_MASK_OVERFLOW_INT );
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+ NVIC_ClearPendingIRQ (INTTB7_IRQn );
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+ NVIC_DisableIRQ (INTTB7_IRQn );
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+ TMRB_SetRunState (TSB_TB7 , TMRB_STOP );
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+ TMRB_Disable (TSB_TB7 );
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}
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