astyle fixes on QSPI API/driver/tests

maciejbocianski · maciejbocianski · commit 883ea2f1d1c1 · 2018-08-22T15:02:15.000+02:00
diff --git a/TESTS/mbed_hal/qspi/main.cpp b/TESTS/mbed_hal/qspi/main.cpp
@@ -99,12 +99,11 @@ static void _qspi_write_read_test(Qspi &qspi, qspi_bus_width_t write_inst_width,
     int erase_time = 0, write_time = 0, read_time = 0;
     size_t buf_len = data_size;
 
-    for (uint32_t tc = 0; tc < test_count; tc++)
-    {
+    for (uint32_t tc = 0; tc < test_count; tc++) {
         qspi.cmd.configure(MODE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8);
 
-        srand (ticker_read(get_us_ticker_data()));
-        for(uint32_t i = 0; i < data_size; i++) {
+        srand(ticker_read(get_us_ticker_data()));
+        for (uint32_t i = 0; i < data_size; i++) {
             tx_buf[i] = (uint8_t)(rand() & 0xFF);
         }
 
@@ -127,8 +126,7 @@ static void _qspi_write_read_test(Qspi &qspi, qspi_bus_width_t write_inst_width,
         }
 
         const uint32_t write_size = data_size / write_count;
-        for (uint32_t wc = 0, write_start = flash_addr; wc < write_count; wc++, write_start += write_size)
-        {
+        for (uint32_t wc = 0, write_start = flash_addr; wc < write_count; wc++, write_start += write_size) {
             ret = write_enable(qspi);
             TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
 
@@ -157,8 +155,7 @@ static void _qspi_write_read_test(Qspi &qspi, qspi_bus_width_t write_inst_width,
         memset(rx_buf, 0, sizeof(rx_buf));
         const uint32_t read_size = data_size / read_count;
         qspi.cmd.configure(read_inst_width, read_addr_width, read_data_width, read_alt_width, read_addr_size, read_alt_size, read_dummy_cycles);
-        for (uint32_t rc = 0, read_start = flash_addr; rc < read_count; rc++, read_start += read_size)
-        {
+        for (uint32_t rc = 0, read_start = flash_addr; rc < read_count; rc++, read_start += read_size) {
             timer.reset();
             timer.start();
 
@@ -226,14 +223,14 @@ void qspi_write_read_test(void)
     flash_init(qspi);
 
     if (is_dual_cmd(write_inst_width, write_addr_width, write_data_width) ||
-        is_dual_cmd(read_inst_width, read_addr_width, read_data_width)) {
+            is_dual_cmd(read_inst_width, read_addr_width, read_data_width)) {
         ret = dual_enable(qspi);
         TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
         WAIT_FOR(WRSR_MAX_TIME, qspi);
     }
 
     if (is_quad_cmd(write_inst_width, write_addr_width, write_data_width) ||
-        is_quad_cmd(read_inst_width, read_addr_width, read_data_width)) {
+            is_quad_cmd(read_inst_width, read_addr_width, read_data_width)) {
         ret = quad_enable(qspi);
         TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
         WAIT_FOR(WRSR_MAX_TIME, qspi);
@@ -270,14 +267,14 @@ void qspi_write_read_test(void)
     qspi.cmd.configure(MODE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8);
 
     if (is_dual_cmd(write_inst_width, write_addr_width, write_data_width) ||
-        is_dual_cmd(read_inst_width, read_addr_width, read_data_width)) {
+            is_dual_cmd(read_inst_width, read_addr_width, read_data_width)) {
         ret = dual_disable(qspi);
         TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
         WAIT_FOR(WRSR_MAX_TIME, qspi);
     }
 
     if (is_quad_cmd(write_inst_width, write_addr_width, write_data_width) ||
-        is_quad_cmd(read_inst_width, read_addr_width, read_data_width)) {
+            is_quad_cmd(read_inst_width, read_addr_width, read_data_width)) {
         ret = quad_disable(qspi);
         TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
         WAIT_FOR(WRSR_MAX_TIME, qspi);
@@ -352,21 +349,21 @@ void qspi_frequency_test(void)
     flash_init(qspi);
     _qspi_write_read_test(qspi, WRITE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_NONE, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_NONE, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS);
 
-    ret = qspi_frequency(&qspi.handle, QSPI_COMMON_MAX_FREQUENCY/2);
+    ret = qspi_frequency(&qspi.handle, QSPI_COMMON_MAX_FREQUENCY / 2);
     TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
     // check if the memory is working properly
     qspi.cmd.configure(MODE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8);
     flash_init(qspi);
     _qspi_write_read_test(qspi, WRITE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_NONE, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_NONE, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS);
 
-    ret = qspi_frequency(&qspi.handle, QSPI_COMMON_MAX_FREQUENCY/4);
+    ret = qspi_frequency(&qspi.handle, QSPI_COMMON_MAX_FREQUENCY / 4);
     TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
     // check if the memory is working properly
     qspi.cmd.configure(MODE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8);
     flash_init(qspi);
     _qspi_write_read_test(qspi, WRITE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_NONE, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_NONE, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS);
 
-    ret = qspi_frequency(&qspi.handle, QSPI_COMMON_MAX_FREQUENCY/8);
+    ret = qspi_frequency(&qspi.handle, QSPI_COMMON_MAX_FREQUENCY / 8);
     TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret);
     // check if the memory is working properly
     qspi.cmd.configure(MODE_1_1_1, ADDR_SIZE_24, ALT_SIZE_8);
diff --git a/TESTS/mbed_hal/qspi/qspi_test_utils.cpp b/TESTS/mbed_hal/qspi/qspi_test_utils.cpp
@@ -32,7 +32,7 @@ void QspiCommand::configure(qspi_bus_width_t inst_width, qspi_bus_width_t addr_w
                             qspi_address_size_t addr_size, qspi_alt_size_t alt_size,
                             int dummy_cycles)
 {
-    memset(&_cmd, 0,  sizeof(qspi_command_t) );
+    memset(&_cmd, 0,  sizeof(qspi_command_t));
     _cmd.instruction.disabled = _cmd.address.disabled = _cmd.alt.disabled = true;
 
     _cmd.instruction.bus_width = inst_width;
@@ -62,7 +62,7 @@ void QspiCommand::build(int instruction, int address, int alt)
     }
 }
 
-qspi_command_t* QspiCommand::get()
+qspi_command_t *QspiCommand::get()
 {
     return &_cmd;
 }
@@ -175,7 +175,7 @@ void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi, const char *str)
 
     for (uint32_t j = 0; j < reg_size; j++) {
         utest_printf("%s byte %u (MSB first): ", str != NULL ? str : "", j);
-        for(int i = 0; i < 8; i++) {
+        for (int i = 0; i < 8; i++) {
             utest_printf("%s ", ((reg[j] & (1 << (7 - i))) & 0xFF) == 0 ? "0" : "1");
         }
         utest_printf("\r\n");
diff --git a/TESTS/mbed_hal/qspi/qspi_test_utils.h b/TESTS/mbed_hal/qspi/qspi_test_utils.h
@@ -36,7 +36,7 @@ class QspiCommand {
 
     void build(int instruction, int address = QSPI_NONE, int alt = QSPI_NONE);
 
-    qspi_command_t * get();
+    qspi_command_t *get();
 
 private:
     qspi_command_t _cmd;
diff --git a/drivers/QSPI.cpp b/drivers/QSPI.cpp
@@ -22,10 +22,10 @@
 
 namespace mbed {
 
-QSPI* QSPI::_owner = NULL;
+QSPI *QSPI::_owner = NULL;
 SingletonPtr<PlatformMutex> QSPI::_mutex;
 
-QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, int mode) : _qspi() 
+QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, int mode) : _qspi()
 {
     _qspi_io0 = io0;
     _qspi_io1 = io1;
@@ -67,7 +67,7 @@ qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width
     return ret_status;
 }
 
-qspi_status_t QSPI::set_frequency(int hz) 
+qspi_status_t QSPI::set_frequency(int hz)
 {
     qspi_status_t ret_status = QSPI_STATUS_OK;
 
@@ -91,7 +91,7 @@ qspi_status_t QSPI::set_frequency(int hz)
     return ret_status;
 }
 
-qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length) 
+qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length)
 {
     qspi_status_t ret_status = QSPI_STATUS_ERROR;
 
@@ -115,10 +115,10 @@ qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_lengt
     return ret_status;
 }
 
-qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *tx_length) 
+qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *tx_length)
 {
     qspi_status_t ret_status = QSPI_STATUS_ERROR;
-    
+
     if (_initialized) {
         if ((tx_length != NULL) && (tx_buffer != NULL)) {
             if (*tx_length != 0) {
@@ -139,15 +139,15 @@ qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *t
     return ret_status;
 }
 
-qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned int address, char *rx_buffer, size_t *rx_length) 
+qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned int address, char *rx_buffer, size_t *rx_length)
 {
     qspi_status_t ret_status = QSPI_STATUS_ERROR;
 
     if (_initialized) {
-        if ( (rx_length != NULL) && (rx_buffer != NULL) ) {
+        if ((rx_length != NULL) && (rx_buffer != NULL)) {
             if (*rx_length != 0) {
                 lock();
-                if ( true == _acquire()) {
+                if (true == _acquire()) {
                     _build_qspi_command(instruction, address, alt);
                     if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
                         ret_status = QSPI_STATUS_OK;
@@ -159,16 +159,16 @@ qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned in
             ret_status = QSPI_STATUS_INVALID_PARAMETER;
         }
     }
-    
+
     return ret_status;
 }
 
-qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned int address, const char *tx_buffer, size_t *tx_length) 
+qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned int address, const char *tx_buffer, size_t *tx_length)
 {
     qspi_status_t ret_status = QSPI_STATUS_ERROR;
-    
+
     if (_initialized) {
-        if ( (tx_length != NULL) && (tx_buffer != NULL) ) {
+        if ((tx_length != NULL) && (tx_buffer != NULL)) {
             if (*tx_length != 0) {
                 lock();
                 if (true == _acquire()) {
@@ -183,71 +183,71 @@ qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned i
             ret_status = QSPI_STATUS_INVALID_PARAMETER;
         }
     }
-    
+
     return ret_status;
 }
 
-qspi_status_t QSPI::command_transfer(unsigned int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length) 
+qspi_status_t QSPI::command_transfer(unsigned int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length)
 {
     qspi_status_t ret_status = QSPI_STATUS_ERROR;
-    
+
     if (_initialized) {
         lock();
         if (true == _acquire()) {
             _build_qspi_command(instruction, address, -1); //We just need the command
             if (QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) {
                 ret_status = QSPI_STATUS_OK;
             }
-        } 
+        }
         unlock();
     }
-    
+
     return ret_status;
 }
 
-void QSPI::lock() 
+void QSPI::lock()
 {
     _mutex->lock();
 }
 
-void QSPI::unlock() 
+void QSPI::unlock()
 {
     _mutex->unlock();
 }
 
 // Note: Private helper function to initialize qspi HAL
-bool QSPI::_initialize() 
+bool QSPI::_initialize()
 {
     if (_mode != 0 && _mode != 1) {
         _initialized = false;
         return _initialized;
     }
 
-    qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode );
+    qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode);
     if (QSPI_STATUS_OK == ret) {
         _initialized = true;
     } else {
         _initialized = false;
     }
-    
+
     return _initialized;
 }
 
 // Note: Private function with no locking
-bool QSPI::_acquire() 
+bool QSPI::_acquire()
 {
     if (_owner != this) {
         //This will set freq as well
         _initialize();
         _owner = this;
     }
-        
+
     return _initialized;
 }
 
-void QSPI::_build_qspi_command(int instruction, int address, int alt) 
+void QSPI::_build_qspi_command(int instruction, int address, int alt)
 {
-    memset( &_qspi_command, 0,  sizeof(qspi_command_t) );
+    memset(&_qspi_command, 0,  sizeof(qspi_command_t));
     //Set up instruction phase parameters
     _qspi_command.instruction.bus_width = _inst_width;
     if (instruction != -1) {
@@ -271,7 +271,7 @@ void QSPI::_build_qspi_command(int instruction, int address, int alt)
     _qspi_command.alt.bus_width = _alt_width;
     _qspi_command.alt.size = _alt_size;
     if (alt != -1) {
-        _qspi_command.alt.value = alt; 
+        _qspi_command.alt.value = alt;
         _qspi_command.alt.disabled = false;
     } else {
         _qspi_command.alt.disabled = true;
diff --git a/drivers/QSPI.h b/drivers/QSPI.h
diff --git a/hal/qspi_api.h b/hal/qspi_api.h

Original file line number	Diff line number	Diff line change
`@@ -32,7 +32,7 @@ void QspiCommand::configure(qspi_bus_width_t inst_width, qspi_bus_width_t addr_w`
`32`	`32`	`qspi_address_size_t addr_size, qspi_alt_size_t alt_size,`
`33`	`33`	`int dummy_cycles)`
`34`	`34`	`{`
`35`		`- memset(&_cmd, 0, sizeof(qspi_command_t) );`
	`35`	`+ memset(&_cmd, 0, sizeof(qspi_command_t));`
`36`	`36`	`_cmd.instruction.disabled = _cmd.address.disabled = _cmd.alt.disabled = true;`
`37`	`37`
`38`	`38`	`_cmd.instruction.bus_width = inst_width;`
`@@ -62,7 +62,7 @@ void QspiCommand::build(int instruction, int address, int alt)`
`62`	`62`	`}`
`63`	`63`	`}`
`64`	`64`
`65`		`-qspi_command_t* QspiCommand::get()`
	`65`	`+qspi_command_t *QspiCommand::get()`
`66`	`66`	`{`
`67`	`67`	`return &_cmd;`
`68`	`68`	`}`
`@@ -175,7 +175,7 @@ void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi, const char *str)`
`175`	`175`
`176`	`176`	`for (uint32_t j = 0; j < reg_size; j++) {`
`177`	`177`	`utest_printf("%s byte %u (MSB first): ", str != NULL ? str : "", j);`
`178`		`- for(int i = 0; i < 8; i++) {`
	`178`	`+ for (int i = 0; i < 8; i++) {`
`179`	`179`	`utest_printf("%s ", ((reg[j] & (1 << (7 - i))) & 0xFF) == 0 ? "0" : "1");`
`180`	`180`	`}`
`181`	`181`	`utest_printf("\r\n");`
Original file line number	Diff line number	Diff line change
`@@ -22,10 +22,10 @@`
`22`	`22`
`23`	`23`	`namespace mbed {`
`24`	`24`
`25`		`-QSPI* QSPI::_owner = NULL;`
	`25`	`+QSPI *QSPI::_owner = NULL;`
`26`	`26`	`SingletonPtr<PlatformMutex> QSPI::_mutex;`
`27`	`27`
`28`		`-QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, int mode) : _qspi()`
	`28`	`+QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, int mode) : _qspi()`
`29`	`29`	`{`
`30`	`30`	`_qspi_io0 = io0;`
`31`	`31`	`_qspi_io1 = io1;`
`@@ -67,7 +67,7 @@ qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width`
`67`	`67`	`return ret_status;`
`68`	`68`	`}`
`69`	`69`
`70`		`-qspi_status_t QSPI::set_frequency(int hz)`
	`70`	`+qspi_status_t QSPI::set_frequency(int hz)`
`71`	`71`	`{`
`72`	`72`	`qspi_status_t ret_status = QSPI_STATUS_OK;`
`73`	`73`
`@@ -91,7 +91,7 @@ qspi_status_t QSPI::set_frequency(int hz)`
`91`	`91`	`return ret_status;`
`92`	`92`	`}`
`93`	`93`
`94`		`-qspi_status_t QSPI::read(unsigned int address, char rx_buffer, size_t rx_length)`
	`94`	`+qspi_status_t QSPI::read(unsigned int address, char rx_buffer, size_t rx_length)`
`95`	`95`	`{`
`96`	`96`	`qspi_status_t ret_status = QSPI_STATUS_ERROR;`
`97`	`97`
`@@ -115,10 +115,10 @@ qspi_status_t QSPI::read(unsigned int address, char rx_buffer, size_t rx_lengt`
`115`	`115`	`return ret_status;`
`116`	`116`	`}`
`117`	`117`
`118`		`-qspi_status_t QSPI::write(unsigned int address, const char tx_buffer, size_t tx_length)`
	`118`	`+qspi_status_t QSPI::write(unsigned int address, const char tx_buffer, size_t tx_length)`
`119`	`119`	`{`
`120`	`120`	`qspi_status_t ret_status = QSPI_STATUS_ERROR;`
`121`		`-`
	`121`	`+`
`122`	`122`	`if (_initialized) {`
`123`	`123`	`if ((tx_length != NULL) && (tx_buffer != NULL)) {`
`124`	`124`	`if (*tx_length != 0) {`
`@@ -139,15 +139,15 @@ qspi_status_t QSPI::write(unsigned int address, const char tx_buffer, size_t t`
`139`	`139`	`return ret_status;`
`140`	`140`	`}`
`141`	`141`
`142`		`-qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned int address, char rx_buffer, size_t rx_length)`
	`142`	`+qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned int address, char rx_buffer, size_t rx_length)`
`143`	`143`	`{`
`144`	`144`	`qspi_status_t ret_status = QSPI_STATUS_ERROR;`
`145`	`145`
`146`	`146`	`if (_initialized) {`
`147`		`- if ( (rx_length != NULL) && (rx_buffer != NULL) ) {`
	`147`	`+ if ((rx_length != NULL) && (rx_buffer != NULL)) {`
`148`	`148`	`if (*rx_length != 0) {`
`149`	`149`	`lock();`
`150`		`- if ( true == _acquire()) {`
	`150`	`+ if (true == _acquire()) {`
`151`	`151`	`_build_qspi_command(instruction, address, alt);`
`152`	`152`	`if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {`
`153`	`153`	`ret_status = QSPI_STATUS_OK;`
`@@ -159,16 +159,16 @@ qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned in`
`159`	`159`	`ret_status = QSPI_STATUS_INVALID_PARAMETER;`
`160`	`160`	`}`
`161`	`161`	`}`
`162`		`-`
	`162`	`+`
`163`	`163`	`return ret_status;`
`164`	`164`	`}`
`165`	`165`
`166`		`-qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned int address, const char tx_buffer, size_t tx_length)`
	`166`	`+qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned int address, const char tx_buffer, size_t tx_length)`
`167`	`167`	`{`
`168`	`168`	`qspi_status_t ret_status = QSPI_STATUS_ERROR;`
`169`		`-`
	`169`	`+`
`170`	`170`	`if (_initialized) {`
`171`		`- if ( (tx_length != NULL) && (tx_buffer != NULL) ) {`
	`171`	`+ if ((tx_length != NULL) && (tx_buffer != NULL)) {`
`172`	`172`	`if (*tx_length != 0) {`
`173`	`173`	`lock();`
`174`	`174`	`if (true == _acquire()) {`
`@@ -183,71 +183,71 @@ qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned i`
`183`	`183`	`ret_status = QSPI_STATUS_INVALID_PARAMETER;`
`184`	`184`	`}`
`185`	`185`	`}`
`186`		`-`
	`186`	`+`
`187`	`187`	`return ret_status;`
`188`	`188`	`}`
`189`	`189`
`190`		`-qspi_status_t QSPI::command_transfer(unsigned int instruction, int address, const char tx_buffer, size_t tx_length, const char rx_buffer, size_t rx_length)`
	`190`	`+qspi_status_t QSPI::command_transfer(unsigned int instruction, int address, const char tx_buffer, size_t tx_length, const char rx_buffer, size_t rx_length)`
`191`	`191`	`{`
`192`	`192`	`qspi_status_t ret_status = QSPI_STATUS_ERROR;`
`193`		`-`
	`193`	`+`
`194`	`194`	`if (_initialized) {`
`195`	`195`	`lock();`
`196`	`196`	`if (true == _acquire()) {`
`197`	`197`	`_build_qspi_command(instruction, address, -1); //We just need the command`
`198`	`198`	`if (QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void )tx_buffer, tx_length, (void )rx_buffer, rx_length)) {`
`199`	`199`	`ret_status = QSPI_STATUS_OK;`
`200`	`200`	`}`
`201`		`- }`
	`201`	`+ }`
`202`	`202`	`unlock();`
`203`	`203`	`}`
`204`		`-`
	`204`	`+`
`205`	`205`	`return ret_status;`
`206`	`206`	`}`
`207`	`207`
`208`		`-void QSPI::lock()`
	`208`	`+void QSPI::lock()`
`209`	`209`	`{`
`210`	`210`	`_mutex->lock();`
`211`	`211`	`}`
`212`	`212`
`213`		`-void QSPI::unlock()`
	`213`	`+void QSPI::unlock()`
`214`	`214`	`{`
`215`	`215`	`_mutex->unlock();`
`216`	`216`	`}`
`217`	`217`
`218`	`218`	`// Note: Private helper function to initialize qspi HAL`
`219`		`-bool QSPI::_initialize()`
	`219`	`+bool QSPI::_initialize()`
`220`	`220`	`{`
`221`	`221`	`if (_mode != 0 && _mode != 1) {`
`222`	`222`	`_initialized = false;`
`223`	`223`	`return _initialized;`
`224`	`224`	`}`
`225`	`225`
`226`		`- qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode );`
	`226`	`+ qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode);`
`227`	`227`	`if (QSPI_STATUS_OK == ret) {`
`228`	`228`	`_initialized = true;`
`229`	`229`	`} else {`
`230`	`230`	`_initialized = false;`
`231`	`231`	`}`
`232`		`-`
	`232`	`+`
`233`	`233`	`return _initialized;`
`234`	`234`	`}`
`235`	`235`
`236`	`236`	`// Note: Private function with no locking`
`237`		`-bool QSPI::_acquire()`
	`237`	`+bool QSPI::_acquire()`
`238`	`238`	`{`
`239`	`239`	`if (_owner != this) {`
`240`	`240`	`//This will set freq as well`
`241`	`241`	`_initialize();`
`242`	`242`	`_owner = this;`
`243`	`243`	`}`
`244`		`-`
	`244`	`+`
`245`	`245`	`return _initialized;`
`246`	`246`	`}`
`247`	`247`
`248`		`-void QSPI::_build_qspi_command(int instruction, int address, int alt)`
	`248`	`+void QSPI::_build_qspi_command(int instruction, int address, int alt)`
`249`	`249`	`{`
`250`		`- memset( &_qspi_command, 0, sizeof(qspi_command_t) );`
	`250`	`+ memset(&_qspi_command, 0, sizeof(qspi_command_t));`
`251`	`251`	`//Set up instruction phase parameters`
`252`	`252`	`_qspi_command.instruction.bus_width = _inst_width;`
`253`	`253`	`if (instruction != -1) {`
`@@ -271,7 +271,7 @@ void QSPI::_build_qspi_command(int instruction, int address, int alt)`
`271`	`271`	`_qspi_command.alt.bus_width = _alt_width;`
`272`	`272`	`_qspi_command.alt.size = _alt_size;`
`273`	`273`	`if (alt != -1) {`
`274`		`- _qspi_command.alt.value = alt;`
	`274`	`+ _qspi_command.alt.value = alt;`
`275`	`275`	`_qspi_command.alt.disabled = false;`
`276`	`276`	`} else {`
`277`	`277`	`_qspi_command.alt.disabled = true;`