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ccli8adbridge
ccli8
authored and
adbridge
committed
Refine pin/peripheral/pin map definitions
Change NUC472 analogin_api.c accordingly
1 parent aa561f2 commit 9127a1a

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5 files changed

+195
-143
lines changed

5 files changed

+195
-143
lines changed

‎targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PeripheralNames.h

Lines changed: 61 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -23,95 +23,101 @@
2323
extern "C" {
2424
#endif
2525

26-
// NOTE: TIMER0_BASE=(APBPERIPH_BASE + 0x10000)
27-
// TIMER1_BASE=(APBPERIPH_BASE + 0x10020)
28-
#define NU_MODNAME(MODBASE, SUBINDEX) ((MODBASE) | (SUBINDEX))
29-
#define NU_MODBASE(MODNAME) ((MODNAME) & 0xFFFFFFE0)
30-
#define NU_MODSUBINDEX(MODNAME) ((MODNAME) & 0x0000001F)
26+
// NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name
27+
// which encodes module base address and module index/subindex.
28+
#define NU_MODSUBINDEX_Pos 0
29+
#define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos)
30+
#define NU_MODINDEX_Pos 20
31+
#define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos)
32+
33+
#define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos))
34+
#define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk))
35+
#define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos)
36+
#define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos)
3137

3238
#if 0
3339
typedef enum {
34-
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0),
35-
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 0),
36-
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 0),
37-
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 0),
38-
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 0),
39-
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 0)
40+
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0, 0),
41+
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 1, 0),
42+
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 2, 0),
43+
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 3, 0),
44+
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0),
45+
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0)
4046
} GPIOName;
4147
#endif
4248

4349
typedef enum {
44-
ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0),
45-
ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 1),
46-
ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 2),
47-
ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 3),
48-
ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 4),
49-
ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 5),
50-
ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 6),
51-
ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 7),
52-
ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 8),
53-
ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 9),
54-
ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 10),
55-
ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 11),
56-
ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 12),
57-
ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 13),
58-
ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 14),
59-
ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 15)
50+
ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0, 0),
51+
ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 0, 1),
52+
ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 0, 2),
53+
ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 0, 3),
54+
ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 0, 4),
55+
ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 0, 5),
56+
ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 0, 6),
57+
ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 0, 7),
58+
ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 0, 8),
59+
ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 0, 9),
60+
ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 0, 10),
61+
ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 0, 11),
62+
ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 0, 12),
63+
ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 0, 13),
64+
ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 0, 14),
65+
ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 0, 15)
6066
} ADCName;
6167

6268
typedef enum {
63-
UART_0 = (int) NU_MODNAME(UART0_BASE, 0),
64-
UART_1 = (int) NU_MODNAME(UART1_BASE, 0),
65-
UART_2 = (int) NU_MODNAME(UART2_BASE, 0),
66-
UART_3 = (int) NU_MODNAME(UART3_BASE, 0),
69+
UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
70+
UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
71+
UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
72+
UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
6773
// FIXME: board-specific
6874
STDIO_UART = UART_3
6975
} UARTName;
7076

7177
typedef enum {
72-
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0),
73-
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 0),
74-
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 0)
78+
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0),
79+
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
80+
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0)
7581
} SPIName;
7682

7783
typedef enum {
78-
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0),
79-
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 0)
84+
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0),
85+
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0)
8086
} I2CName;
8187

8288
typedef enum {
83-
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0),
84-
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 1),
85-
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 2),
86-
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 3),
87-
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 4),
88-
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 5),
89+
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0, 0),
90+
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 0, 1),
91+
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 0, 2),
92+
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 0, 3),
93+
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 0, 4),
94+
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 0, 5),
8995

90-
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 0),
91-
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1),
92-
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 2),
93-
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 3),
94-
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 4),
95-
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 5)
96+
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 1, 0),
97+
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1, 1),
98+
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 1, 2),
99+
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 1, 3),
100+
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 1, 4),
101+
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 1, 5)
96102
} PWMName;
97103

98104
typedef enum {
99-
TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0),
100-
TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x20, 0),
101-
TIMER_2 = (int) NU_MODNAME(TMR23_BASE, 0),
102-
TIMER_3 = (int) NU_MODNAME(TMR23_BASE + 0x20, 0),
105+
TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0, 0),
106+
TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x20, 1, 0),
107+
TIMER_2 = (int) NU_MODNAME(TMR23_BASE, 2, 0),
108+
TIMER_3 = (int) NU_MODNAME(TMR23_BASE + 0x20, 3, 0),
103109
} TIMERName;
104110

105111
typedef enum {
106-
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0)
112+
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
107113
} RTCName;
108114

109115
typedef enum {
110-
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0)
116+
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0)
111117
} DMAName;
112118

113119
typedef enum {
114-
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0)
120+
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0)
115121
} CANName;
116122

117123
#ifdef __cplusplus

‎targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PinNames.h

Lines changed: 26 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -22,13 +22,32 @@
2222
extern "C" {
2323
#endif
2424

25-
#define NU_PORT_SHIFT 12
26-
#define NU_PINNAME_TO_PORT(name) ((unsigned int)(name) >> NU_PORT_SHIFT)
27-
#define NU_PINNAME_TO_PIN(name) ((unsigned int)(name) & ~(0xFFFFFFFF << NU_PORT_SHIFT))
28-
#define NU_PORT_N_PIN_TO_PINNAME(port, pin) ((((unsigned int) (port)) << (NU_PORT_SHIFT)) | ((unsigned int) (pin)))
29-
#define NU_PORT_BASE(port) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * port))
30-
#define NU_MFP_POS(pin) ((pin % 8) * 4)
31-
#define NU_MFP_MSK(pin) (0xful << NU_MFP_POS(pin))
25+
#define NU_PININDEX_Pos 0
26+
#define NU_PININDEX_Msk (0xFFul << NU_PININDEX_Pos)
27+
#define NU_PINPORT_Pos 8
28+
#define NU_PINPORT_Msk (0xFul << NU_PINPORT_Pos)
29+
#define NU_PIN_MODINDEX_Pos 12
30+
#define NU_PIN_MODINDEX_Msk (0xFul << NU_PIN_MODINDEX_Pos)
31+
#define NU_PIN_BIND_Pos 16
32+
#define NU_PIN_BIND_Msk (0x1ul << NU_PIN_BIND_Pos)
33+
34+
#define NU_PININDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PININDEX_Msk) >> NU_PININDEX_Pos)
35+
#define NU_PINPORT(PINNAME) (((unsigned int)(PINNAME) & NU_PINPORT_Msk) >> NU_PINPORT_Pos)
36+
#define NU_PIN_BIND(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_BIND_Msk) >> NU_PIN_BIND_Pos)
37+
#define NU_PIN_MODINDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_MODINDEX_Msk) >> NU_PIN_MODINDEX_Pos)
38+
#define NU_PINNAME(PORT, PIN) ((((unsigned int) (PORT)) << (NU_PINPORT_Pos)) | (((unsigned int) (PIN)) << NU_PININDEX_Pos))
39+
#define NU_PINNAME_BIND(PINNAME, modname) NU_PINNAME_BIND_(NU_PINPORT(PINNAME), NU_PININDEX(PINNAME), modname)
40+
#define NU_PINNAME_BIND_(PORT, PIN, modname) ((((unsigned int)(PORT)) << NU_PINPORT_Pos) | (((unsigned int)(PIN)) << NU_PININDEX_Pos) | (NU_MODINDEX(modname) << NU_PIN_MODINDEX_Pos) | NU_PIN_BIND_Msk)
41+
42+
#define NU_PORT_BASE(port) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * port))
43+
#define NU_MFP_POS(pin) ((pin % 8) * 4)
44+
#define NU_MFP_MSK(pin) (0xful << NU_MFP_POS(pin))
45+
46+
// LEGACY
47+
#define NU_PINNAME_TO_PIN(PINNAME) NU_PININDEX(PINNAME)
48+
#define NU_PINNAME_TO_PORT(PINNAME) NU_PINPORT(PINNAME)
49+
#define NU_PINNAME_TO_MODSUBINDEX(PINNAME) NU_PIN_MODINDEX(PINNAME)
50+
#define NU_PORT_N_PIN_TO_PINNAME(PORT, PIN) NU_PINNAME((PORT), (PIN))
3251

3352
typedef enum {
3453
PIN_INPUT,

‎targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PeripheralNames.h

Lines changed: 73 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -23,111 +23,117 @@
2323
extern "C" {
2424
#endif
2525

26-
// NOTE: TIMER0_BASE=(APBPERIPH_BASE + 0x10000)
27-
// TIMER1_BASE=(APBPERIPH_BASE + 0x10020)
28-
#define NU_MODNAME(MODBASE, SUBINDEX) ((MODBASE) | (SUBINDEX))
29-
#define NU_MODBASE(MODNAME) ((MODNAME) & 0xFFFFFFE0)
30-
#define NU_MODSUBINDEX(MODNAME) ((MODNAME) & 0x0000001F)
26+
// NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name
27+
// which encodes module base address and module index/subindex.
28+
#define NU_MODSUBINDEX_Pos 0
29+
#define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos)
30+
#define NU_MODINDEX_Pos 20
31+
#define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos)
32+
33+
#define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos))
34+
#define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk))
35+
#define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos)
36+
#define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos)
3137

3238
#if 0
3339
typedef enum {
34-
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0),
35-
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 0),
36-
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 0),
37-
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 0),
38-
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 0),
39-
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 0),
40-
GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 0),
41-
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 0),
42-
GPIO_I = (int) NU_MODNAME(GPIOI_BASE, 0)
40+
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0, 0),
41+
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 1, 0),
42+
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 2, 0),
43+
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 3, 0),
44+
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0),
45+
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0),
46+
GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 6, 0),
47+
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 7, 0),
48+
GPIO_I = (int) NU_MODNAME(GPIOI_BASE, 8, 0)
4349
} GPIOName;
4450
#endif
4551

4652
typedef enum {
47-
ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0),
48-
ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 1),
49-
ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 2),
50-
ADC_0_3 = (int) NU_MODNAME(EADC_BASE, 3),
51-
ADC_0_4 = (int) NU_MODNAME(EADC_BASE, 4),
52-
ADC_0_5 = (int) NU_MODNAME(EADC_BASE, 5),
53-
ADC_0_6 = (int) NU_MODNAME(EADC_BASE, 6),
54-
ADC_0_7 = (int) NU_MODNAME(EADC_BASE, 7),
53+
ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0, 0),
54+
ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 0, 1),
55+
ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 0, 2),
56+
ADC_0_3 = (int) NU_MODNAME(EADC_BASE, 0, 3),
57+
ADC_0_4 = (int) NU_MODNAME(EADC_BASE, 0, 4),
58+
ADC_0_5 = (int) NU_MODNAME(EADC_BASE, 0, 5),
59+
ADC_0_6 = (int) NU_MODNAME(EADC_BASE, 0, 6),
60+
ADC_0_7 = (int) NU_MODNAME(EADC_BASE, 0, 7),
5561

56-
ADC_1_0 = (int) NU_MODNAME(EADC_BASE, 8),
57-
ADC_1_1 = (int) NU_MODNAME(EADC_BASE, 9),
58-
ADC_1_2 = (int) NU_MODNAME(EADC_BASE, 10),
59-
ADC_1_3 = (int) NU_MODNAME(EADC_BASE, 11),
60-
ADC_1_4 = (int) NU_MODNAME(EADC_BASE, 12),
61-
ADC_1_5 = (int) NU_MODNAME(EADC_BASE, 13),
62-
ADC_1_6 = (int) NU_MODNAME(EADC_BASE, 14),
63-
ADC_1_7 = (int) NU_MODNAME(EADC_BASE, 15),
62+
ADC_1_0 = (int) NU_MODNAME(EADC_BASE, 1, 0),
63+
ADC_1_1 = (int) NU_MODNAME(EADC_BASE, 1, 1),
64+
ADC_1_2 = (int) NU_MODNAME(EADC_BASE, 1, 2),
65+
ADC_1_3 = (int) NU_MODNAME(EADC_BASE, 1, 3),
66+
ADC_1_4 = (int) NU_MODNAME(EADC_BASE, 1, 4),
67+
ADC_1_5 = (int) NU_MODNAME(EADC_BASE, 1, 5),
68+
ADC_1_6 = (int) NU_MODNAME(EADC_BASE, 1, 6),
69+
ADC_1_7 = (int) NU_MODNAME(EADC_BASE, 1, 7),
6470
} ADCName;
6571

6672
typedef enum {
67-
UART_0 = (int) NU_MODNAME(UART0_BASE, 0),
68-
UART_1 = (int) NU_MODNAME(UART1_BASE, 0),
69-
UART_2 = (int) NU_MODNAME(UART2_BASE, 0),
70-
UART_3 = (int) NU_MODNAME(UART3_BASE, 0),
71-
UART_4 = (int) NU_MODNAME(UART4_BASE, 0),
72-
UART_5 = (int) NU_MODNAME(UART5_BASE, 0),
73+
UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
74+
UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
75+
UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
76+
UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
77+
UART_4 = (int) NU_MODNAME(UART4_BASE, 4, 0),
78+
UART_5 = (int) NU_MODNAME(UART5_BASE, 5, 0),
7379
// FIXME: board-specific
7480
STDIO_UART = UART_3
7581
} UARTName;
7682

7783
typedef enum {
78-
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0),
79-
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 0),
80-
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 0),
81-
SPI_3 = (int) NU_MODNAME(SPI3_BASE, 0)
84+
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0),
85+
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
86+
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0),
87+
SPI_3 = (int) NU_MODNAME(SPI3_BASE, 3, 0)
8288
} SPIName;
8389

8490
typedef enum {
85-
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0),
86-
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 0),
87-
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 0),
88-
I2C_3 = (int) NU_MODNAME(I2C3_BASE, 0),
89-
I2C_4 = (int) NU_MODNAME(I2C4_BASE, 0)
91+
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0),
92+
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0),
93+
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 2, 0),
94+
I2C_3 = (int) NU_MODNAME(I2C3_BASE, 3, 0),
95+
I2C_4 = (int) NU_MODNAME(I2C4_BASE, 4, 0)
9096
} I2CName;
9197

9298
typedef enum {
93-
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0),
94-
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 1),
95-
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 2),
96-
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 3),
97-
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 4),
98-
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 5),
99+
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0, 0),
100+
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 0, 1),
101+
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 0, 2),
102+
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 0, 3),
103+
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 0, 4),
104+
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 0, 5),
99105

100-
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 0),
101-
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1),
102-
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 2),
103-
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 3),
104-
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 4),
105-
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 5)
106+
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 1, 0),
107+
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1, 1),
108+
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 1, 2),
109+
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 1, 3),
110+
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 1, 4),
111+
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 1, 5)
106112
} PWMName;
107113

108114
typedef enum {
109-
TIMER_0 = (int) NU_MODNAME(TIMER0_BASE, 0),
110-
TIMER_1 = (int) NU_MODNAME(TIMER1_BASE, 0),
111-
TIMER_2 = (int) NU_MODNAME(TIMER2_BASE, 0),
112-
TIMER_3 = (int) NU_MODNAME(TIMER3_BASE, 0)
115+
TIMER_0 = (int) NU_MODNAME(TIMER0_BASE, 0, 0),
116+
TIMER_1 = (int) NU_MODNAME(TIMER1_BASE, 1, 0),
117+
TIMER_2 = (int) NU_MODNAME(TIMER2_BASE, 2, 0),
118+
TIMER_3 = (int) NU_MODNAME(TIMER3_BASE, 3, 0)
113119
} TIMERName;
114120

115121
typedef enum {
116-
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0)
122+
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
117123
} RTCName;
118124

119125
typedef enum {
120-
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0)
126+
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0)
121127
} DMAName;
122128

123129
typedef enum {
124-
SD_0_0 = (int) NU_MODNAME(SD_BASE, 0),
125-
SD_0_1 = (int) NU_MODNAME(SD_BASE, 1)
130+
SD_0_0 = (int) NU_MODNAME(SD_BASE, 0, 0),
131+
SD_0_1 = (int) NU_MODNAME(SD_BASE, 0, 1)
126132
} SDName;
127133

128134
typedef enum {
129-
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0),
130-
CAN_1 = (int) NU_MODNAME(CAN1_BASE, 0)
135+
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0),
136+
CAN_1 = (int) NU_MODNAME(CAN1_BASE, 1, 0)
131137
} CANName;
132138

133139
#ifdef __cplusplus

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