Skip to content

Commit 927cba8

Browse files
jeromecoutantjeromecoutant
committed
STM32F4: remove deprecated macro
1 parent 39d981c commit 927cba8

File tree

38 files changed

+125
-125
lines changed

38 files changed

+125
-125
lines changed

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,10 @@
4444

4545
#define TIM_MST TIM5
4646
#define TIM_MST_IRQ TIM5_IRQn
47-
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
47+
#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
4848

49-
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
50-
#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
49+
#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
50+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
5151

5252
#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
5353

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_stm32f4xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -837,7 +837,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
837837
/* The voltage scaling allows optimizing the power consumption when the device is
838838
clocked below the maximum system frequency, to update the voltage scaling value
839839
regarding system frequency refer to product datasheet. */
840-
__PWR_CLK_ENABLE();
840+
__HAL_RCC_PWR_CLK_ENABLE();
841841
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
842842

843843
/* Enable HSE oscillator and activate PLL with HSE as source */
@@ -896,7 +896,7 @@ uint8_t SetSysClock_PLL_HSI(void)
896896
/* The voltage scaling allows optimizing the power consumption when the device is
897897
clocked below the maximum system frequency, to update the voltage scaling value
898898
regarding system frequency refer to product datasheet. */
899-
__PWR_CLK_ENABLE();
899+
__HAL_RCC_PWR_CLK_ENABLE();
900900
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
901901

902902
/* Enable HSI oscillator and activate PLL with HSI as source */

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,10 @@
4444

4545
#define TIM_MST TIM5
4646
#define TIM_MST_IRQ TIM5_IRQn
47-
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
47+
#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
4848

49-
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
50-
#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
49+
#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
50+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
5151

5252
#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
5353

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/system_stm32f4xx.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -778,7 +778,7 @@ void SetSysClock(void)
778778
RCC_ClkInitTypeDef RCC_ClkInitStruct;
779779
RCC_OscInitTypeDef RCC_OscInitStruct;
780780

781-
__PWR_CLK_ENABLE();
781+
__HAL_RCC_PWR_CLK_ENABLE();
782782

783783
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
784784

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,10 @@
4444

4545
#define TIM_MST TIM5
4646
#define TIM_MST_IRQ TIM5_IRQn
47-
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
47+
#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
4848

49-
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
50-
#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
49+
#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
50+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
5151

5252
#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
5353

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/system_stm32f4xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -842,7 +842,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
842842
/* The voltage scaling allows optimizing the power consumption when the device is
843843
clocked below the maximum system frequency, to update the voltage scaling value
844844
regarding system frequency refer to product datasheet. */
845-
__PWR_CLK_ENABLE();
845+
__HAL_RCC_PWR_CLK_ENABLE();
846846
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
847847

848848
/* Enable HSE oscillator and activate PLL with HSE as source */
@@ -899,7 +899,7 @@ uint8_t SetSysClock_PLL_HSI(void)
899899
/* The voltage scaling allows optimizing the power consumption when the device is
900900
clocked below the maximum system frequency, to update the voltage scaling value
901901
regarding system frequency refer to product datasheet. */
902-
__PWR_CLK_ENABLE();
902+
__HAL_RCC_PWR_CLK_ENABLE();
903903
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
904904

905905
/* Enable HSI oscillator and activate PLL with HSI as source */

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/system_stm32f4xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -835,7 +835,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
835835
/* The voltage scaling allows optimizing the power consumption when the device is
836836
clocked below the maximum system frequency, to update the voltage scaling value
837837
regarding system frequency refer to product datasheet. */
838-
__PWR_CLK_ENABLE();
838+
__HAL_RCC_PWR_CLK_ENABLE();
839839
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
840840

841841
/* Enable HSE oscillator and activate PLL with HSE as source */
@@ -893,7 +893,7 @@ uint8_t SetSysClock_PLL_HSI(void)
893893
/* The voltage scaling allows optimizing the power consumption when the device is
894894
clocked below the maximum system frequency, to update the voltage scaling value
895895
regarding system frequency refer to product datasheet. */
896-
__PWR_CLK_ENABLE();
896+
__HAL_RCC_PWR_CLK_ENABLE();
897897
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
898898

899899
/* Enable HSI oscillator and activate PLL with HSI as source */

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,10 @@
4444

4545
#define TIM_MST TIM5
4646
#define TIM_MST_IRQ TIM5_IRQn
47-
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
47+
#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
4848

49-
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
50-
#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
49+
#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
50+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
5151

5252
#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
5353

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/system_stm32f4xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -835,7 +835,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
835835
/* The voltage scaling allows optimizing the power consumption when the device is
836836
clocked below the maximum system frequency, to update the voltage scaling value
837837
regarding system frequency refer to product datasheet. */
838-
__PWR_CLK_ENABLE();
838+
__HAL_RCC_PWR_CLK_ENABLE();
839839
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
840840

841841
/* Enable HSE oscillator and activate PLL with HSE as source */
@@ -893,7 +893,7 @@ uint8_t SetSysClock_PLL_HSI(void)
893893
/* The voltage scaling allows optimizing the power consumption when the device is
894894
clocked below the maximum system frequency, to update the voltage scaling value
895895
regarding system frequency refer to product datasheet. */
896-
__PWR_CLK_ENABLE();
896+
__HAL_RCC_PWR_CLK_ENABLE();
897897
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
898898

899899
/* Enable HSI oscillator and activate PLL with HSI as source */

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/hal_tick.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,10 @@
4444

4545
#define TIM_MST TIM5
4646
#define TIM_MST_IRQ TIM5_IRQn
47-
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
47+
#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
4848

49-
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
50-
#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
49+
#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
50+
#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
5151

5252
#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
5353

0 commit comments

Comments
 (0)