Merge pull request #1923 from bridadan/tools_integration_rebase

Tools integration rebase

Author: 0xc0170

hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_ARM_STD/startup_BEETLE.s

@@ -26,28 +26,7 @@
 ;*/
 
 
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
+__initial_sp        EQU     0x20020000  ; Top of RAM
 
                 PRESERVE8
                 THUMB
@@ -286,31 +265,4 @@ TRNG_Handler
 
                 ALIGN
 
-
-; User Initial Stack & Heap
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ALIGN
-
-                ENDIF
-
-
                 END

hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_ARM_STD/sys.cpp

@@ -0,0 +1,43 @@
+/*
+ * PackageLicenseDeclared: Apache-2.0
+ * Copyright (c) 2015 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+
+ #include <rt_misc.h>
+ #include <stdint.h>
+
+/* Get RW_IRAM1 from scatter definition */
+ extern char Image$$RW_IRAM1$$ZI$$Limit[];
+
+ extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+     uint32_t beetle_zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
+     uint32_t beetle_sp_limit = __current_sp();
+
+     /* beetle_zi_limit has to be 8-byte aligned */
+     beetle_zi_limit = (beetle_zi_limit + 7) & ~0x7;
+
+     struct __initial_stackheap r;
+     r.heap_base = beetle_zi_limit;
+     r.heap_limit = beetle_sp_limit;
+     return r;
+ }
+
+ #ifdef __cplusplus
+ }
+ #endif

hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/systick_timer.c

@@ -30,7 +30,7 @@ static uint32_t clock;
 #define SYSTICK_MAX_RELOAD    0xFFFFFFFF
 #define SYSTICK_DIVIDER_US    (SystemCoreClock/1000000)
 
-void SysTick_Handler(void)
+void SysTick_IRQ_Handler(void)
 {
     MyTicks++;
 #if 0
@@ -60,6 +60,10 @@ void SysTick_Initialize(void)
     SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk
         | SysTick_CTRL_ENABLE_Msk
         | SysTick_CTRL_TICKINT_Msk;
+
+    /* Register the Interrupt */
+    NVIC_SetVector(SysTick_IRQn, (uint32_t)SysTick_IRQ_Handler);
+    NVIC_EnableIRQ(SysTick_IRQn);
 }
 
 /*

hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s renamed to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S

@@ -42,13 +42,13 @@
                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
                 EXPORT  __initial_sp
 
-__initial_sp    EQU     0x10008000 ; Top of RAM, L4-ECC-SRAM2 retained in standby
+__initial_sp    EQU     0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standby
 
 ; <h> Heap Configuration
 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Heap_Size       EQU     0x18000 ; 96KB
+Heap_Size       EQU     0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler)
 
                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
                 EXPORT  __heap_base

hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct

@@ -36,12 +36,11 @@ LR_IROM1 0x08000000 0x100000  {    ; load region size_region
    .ANY (+RO)
   }
 
-  ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
-  RW_IRAM1 (0x10000000+0x188) (0x08000-0x188)  {  ; RW data 32k L4-ECC-SRAM2 retained in standby
+  RW_IRAM1 0x20000000 0x00018000  { ; RW data 96k L4-SRAM1
    .ANY (+RW +ZI)
   }
-
-  RW_IRAM2 0x20000000 0x00018000  { ; RW data 96k L4-SRAM1
+ ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
+  RW_IRAM2 (0x10000000+0x188) (0x08000-0x188)  {  ; RW data 32k L4-ECC-SRAM2 retained in standby
    .ANY (+RW +ZI)
   }
 

hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.s renamed to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.S

@@ -48,7 +48,7 @@ __initial_sp    EQU     0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standb
 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Heap_Size       EQU     0x18000 ; 96KB
+Heap_Size       EQU     0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler)
 
                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
                 EXPORT  __heap_base