First pass on TB Sense (and EFR32MG12) support

Author: Steven Cooreman

features/nanostack/FEATURE_NANOSTACK/targets/TARGET_SL_RAIL/NanostackRfPhyEfr32.cpp

@@ -67,6 +67,8 @@ static const RAIL_CsmaConfig_t csma_config = RAIL_CSMA_CONFIG_802_15_4_2003_2p4_
 #if defined(TARGET_EFR32MG1)
 #include "ieee802154_subg_efr32xg1_configurator_out.h"
 #include "ieee802154_efr32xg1_configurator_out.h"
+#elif defined(TARGET_EFR32MG12)
+#include "ieee802154_efr32xg12_configurator_out.h"
 #else
 #error "Not a valid target."
 #endif
@@ -724,7 +726,7 @@ void RAILCb_RxPacketReceived(void *rxPacketHandle) {
             /* Save the pending bit */
             last_ack_pending_bit = (rxPacketInfo->dataPtr[1] & (1 << 4)) != 0;
             /* Tell the stack we got an ACK */
-            tr_debug("rACK\n");
+            //tr_debug("rACK\n");
             device_driver.phy_tx_done_cb( rf_radio_driver_id,
                                           current_tx_handle,
                                           PHY_LINK_TX_DONE,
@@ -745,7 +747,7 @@ void RAILCb_RxPacketReceived(void *rxPacketHandle) {
                 RAIL_AutoAckCancelAck();
             }
 
-            tr_debug("rPKT %d\n", rxPacketInfo->dataLength);
+            //tr_debug("rPKT %d\n", rxPacketInfo->dataLength);
             /* Feed the received packet into the stack */
             device_driver.phy_rx_cb(rxPacketInfo->dataPtr + 1, 
                                     rxPacketInfo->dataLength - 1, 

targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/PeripheralNames.h

@@ -0,0 +1,69 @@
+/***************************************************************************//**
+ * @file PeripheralNames.h
+ *******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
+ *******************************************************************************
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************/
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "em_adc.h"
+#include "em_usart.h"
+#include "em_i2c.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ADC_0 = ADC0_BASE
+} ADCName;
+
+typedef enum {
+    I2C_0 = I2C0_BASE,
+    I2C_1 = I2C1_BASE,
+} I2CName;
+
+typedef enum {
+    PWM_CH0 = 0,
+    PWM_CH1 = 1,
+    PWM_CH2 = 2,
+    PWM_CH3 = 3
+} PWMName;
+
+typedef enum {
+    USART_0 = USART0_BASE,
+    USART_1 = USART1_BASE,
+    USART_2 = USART2_BASE,
+    USART_3 = USART3_BASE,
+    LEUART_0 = LEUART0_BASE,
+} UARTName;
+
+typedef enum {
+    SPI_0 = USART0_BASE,
+    SPI_1 = USART1_BASE,
+    SPI_2 = USART2_BASE,
+    SPI_3 = USART3_BASE,
+} SPIName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif