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STM32F1 baremetal support
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‎targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM/stm32f103xb.sct

Lines changed: 36 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -1,56 +1,53 @@
11
#! armcc -E
22
; Scatter-Loading Description File
3-
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
4-
; Copyright (c) 2016, STMicroelectronics
5-
; All rights reserved.
63
;
7-
; Redistribution and use in source and binary forms, with or without
8-
; modification, are permitted provided that the following conditions are met:
9-
;
10-
; 1. Redistributions of source code must retain the above copyright notice,
11-
; this list of conditions and the following disclaimer.
12-
; 2. Redistributions in binary form must reproduce the above copyright notice,
13-
; this list of conditions and the following disclaimer in the documentation
14-
; and/or other materials provided with the distribution.
15-
; 3. Neither the name of STMicroelectronics nor the names of its contributors
16-
; may be used to endorse or promote products derived from this software
17-
; without specific prior written permission.
18-
;
19-
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20-
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21-
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22-
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23-
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24-
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25-
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26-
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27-
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28-
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29-
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
4+
; SPDX-License-Identifier: BSD-3-Clause
5+
;******************************************************************************
6+
;* @attention
7+
;*
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
9+
;* All rights reserved.
10+
;*
11+
;* This software component is licensed by ST under BSD 3-Clause license,
12+
;* the "License"; You may not use this file except in compliance with the
13+
;* License. You may obtain a copy of the License at:
14+
;* opensource.org/licenses/BSD-3-Clause
15+
;*
16+
;******************************************************************************
17+
18+
#include "../cmsis_nvic.h"
19+
20+
#if !defined(MBED_APP_START)
21+
#define MBED_APP_START MBED_ROM_START
22+
#endif
23+
24+
#if !defined(MBED_APP_SIZE)
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
26+
#endif
3027

3128
#if !defined(MBED_BOOT_STACK_SIZE)
32-
#define MBED_BOOT_STACK_SIZE 0x400
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#define MBED_BOOT_STACK_SIZE 0x400
3331
#endif
3432

35-
#define Stack_Size MBED_BOOT_STACK_SIZE
33+
/* Round up VECTORS_SIZE to 8 bytes */
34+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
3635

37-
LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K)
36+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
3837

39-
ER_IROM1 0x08000000 0x20000 { ; load address = execution address
40-
*.o (RESET, +First)
41-
*(InRoot$$Sections)
42-
.ANY (+RO)
38+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
39+
*.o (RESET, +First)
40+
*(InRoot$$Sections)
41+
.ANY (+RO)
4342
}
4443

45-
; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0
46-
RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0-Stack_Size) { ; RW data
47-
.ANY (+RW +ZI)
44+
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
45+
.ANY (+RW +ZI)
4846
}
4947

50-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000+0x5000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)-0xF0) {
48+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
5149
}
5250

53-
ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack
51+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
5452
}
5553
}
56-

‎targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld

Lines changed: 56 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,51 @@
11
/* Linker script to configure memory regions. */
2-
/* 0xEC reserved for vectors; 8-byte aligned = 0xF0 */
2+
/*
3+
* SPDX-License-Identifier: BSD-3-Clause
4+
******************************************************************************
5+
* @attention
6+
*
7+
* Copyright (c) 2016-2020 STMicroelectronics.
8+
* All rights reserved.
9+
*
10+
* This software component is licensed by ST under BSD 3-Clause license,
11+
* the "License"; You may not use this file except in compliance with the
12+
* License. You may obtain a copy of the License at:
13+
* opensource.org/licenses/BSD-3-Clause
14+
*
15+
******************************************************************************
16+
*/
17+
18+
#include "../cmsis_nvic.h"
19+
20+
21+
#if !defined(MBED_APP_START)
22+
#define MBED_APP_START MBED_ROM_START
23+
#endif
24+
25+
#if !defined(MBED_APP_SIZE)
26+
#define MBED_APP_SIZE MBED_ROM_SIZE
27+
#endif
328

429
#if !defined(MBED_BOOT_STACK_SIZE)
5-
#define MBED_BOOT_STACK_SIZE 0x400
30+
/* This value is normally defined by the tools
31+
to 0x1000 for bare metal and 0x400 for RTOS */
32+
#define MBED_BOOT_STACK_SIZE 0x400
633
#endif
734

8-
STACK_SIZE = MBED_BOOT_STACK_SIZE;
35+
/* Round up VECTORS_SIZE to 8 bytes */
36+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
937

1038
MEMORY
11-
{
12-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
13-
RAM (rwx) : ORIGIN = 0x200000F0, LENGTH = 20K - (0xEC+0x4)
39+
{
40+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
41+
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
1442
}
1543

1644
/* Linker script to place sections and symbol values. Should be used together
1745
* with other linker script that defines memory regions FLASH and RAM.
1846
* It references following symbols, which must be defined in code:
1947
* Reset_Handler : Entry of reset handler
20-
*
48+
*
2149
* It defines following symbols, which code can use without definition:
2250
* __exidx_start
2351
* __exidx_end
@@ -48,6 +76,7 @@ SECTIONS
4876
{
4977
KEEP(*(.isr_vector))
5078
*(.text*)
79+
5180
KEEP(*(.init))
5281
KEEP(*(.fini))
5382

@@ -70,7 +99,7 @@ SECTIONS
7099
KEEP(*(.eh_frame*))
71100
} > FLASH
72101

73-
.ARM.extab :
102+
.ARM.extab :
74103
{
75104
*(.ARM.extab* .gnu.linkonce.armextab.*)
76105
} > FLASH
@@ -84,7 +113,7 @@ SECTIONS
84113

85114
__etext = .;
86115
_sidata = .;
87-
116+
88117
.data : AT (__etext)
89118
{
90119
__data_start__ = .;
@@ -105,7 +134,6 @@ SECTIONS
105134
KEEP(*(.init_array))
106135
PROVIDE_HIDDEN (__init_array_end = .);
107136

108-
109137
. = ALIGN(8);
110138
/* finit data */
111139
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -121,6 +149,19 @@ SECTIONS
121149

122150
} > RAM
123151

152+
/* Uninitialized data section
153+
* This region is not initialized by the C/C++ library and can be used to
154+
* store state across soft reboots. */
155+
.uninitialized (NOLOAD):
156+
{
157+
. = ALIGN(32);
158+
__uninitialized_start = .;
159+
*(.uninitialized)
160+
KEEP(*(.keep.uninitialized))
161+
. = ALIGN(32);
162+
__uninitialized_end = .;
163+
} > RAM
164+
124165
.bss :
125166
{
126167
. = ALIGN(8);
@@ -132,13 +173,13 @@ SECTIONS
132173
__bss_end__ = .;
133174
_ebss = .;
134175
} > RAM
135-
176+
136177
.heap (COPY):
137178
{
138179
__end__ = .;
139-
end = __end__;
180+
PROVIDE(end = .);
140181
*(.heap*)
141-
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
182+
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
142183
__HeapLimit = .;
143184
} > RAM
144185

@@ -154,10 +195,9 @@ SECTIONS
154195
* size of stack_dummy section */
155196
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
156197
_estack = __StackTop;
157-
__StackLimit = __StackTop - STACK_SIZE;
198+
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
158199
PROVIDE(__stack = __StackTop);
159-
200+
160201
/* Check if data + heap + stack exceeds RAM limit */
161202
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
162203
}
163-

‎targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf

Lines changed: 46 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,35 +1,59 @@
1-
/*###ICF### Section handled by ICF editor, don't touch! ****/
2-
/*-Editor annotation file-*/
3-
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4-
/*-Specials-*/
5-
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6-
/*-Memory Regions-*/
7-
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8-
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9-
define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
10-
define symbol __ICFEDIT_region_NVIC_end__ = 0x200000F0 - 0x1;
11-
define symbol __ICFEDIT_region_RAM_start__ = 0x200000F0; /* 8-byte aligned (0xEC) = 0xF0 */
12-
define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
13-
/*-Sizes-*/
1+
/* Linker script to configure memory regions.
2+
*
3+
* SPDX-License-Identifier: BSD-3-Clause
4+
******************************************************************************
5+
* @attention
6+
*
7+
* Copyright (c) 2016-2020 STMicroelectronics.
8+
* All rights reserved.
9+
*
10+
* This software component is licensed by ST under BSD 3-Clause license,
11+
* the "License"; You may not use this file except in compliance with the
12+
* License. You may obtain a copy of the License at:
13+
* opensource.org/licenses/BSD-3-Clause
14+
*
15+
******************************************************************************
16+
*/
17+
/* Device specific values */
18+
19+
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
20+
21+
define symbol VECTORS = 59; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
22+
define symbol HEAP_SIZE = 0x1000;
23+
24+
/* Common - Do not change */
25+
26+
if (!isdefinedsymbol(MBED_APP_START)) {
27+
define symbol MBED_APP_START = MBED_ROM_START;
28+
}
29+
30+
if (!isdefinedsymbol(MBED_APP_SIZE)) {
31+
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
32+
}
33+
1434
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
35+
/* This value is normally defined by the tools
36+
to 0x1000 for bare metal and 0x400 for RTOS */
1537
define symbol MBED_BOOT_STACK_SIZE = 0x400;
1638
}
17-
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
18-
define symbol __ICFEDIT_size_heap__ = 0x1400;
19-
/**** End of ICF editor section. ###ICF###*/
39+
40+
/* Round up VECTORS_SIZE to 8 bytes */
41+
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
42+
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
43+
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
2044

2145
define memory mem with size = 4G;
22-
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
23-
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
46+
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
47+
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
2448

25-
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
26-
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
49+
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
50+
define block HEAP with alignment = 8, size = HEAP_SIZE { };
2751

2852
initialize by copy { readwrite };
2953
do not initialize { section .noinit };
3054

31-
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
55+
place at address mem: MBED_APP_START { readonly section .intvec };
3256

3357
place in ROM_region { readonly };
3458
place in RAM_region { readwrite,
35-
block HEAP, block CSTACK };
59+
block CSTACK, block HEAP };

‎targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/cmsis_nvic.h

Lines changed: 29 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1,40 +1,39 @@
11
/* mbed Microcontroller Library
2-
*******************************************************************************
3-
* Copyright (c) 2016, STMicroelectronics
4-
* All rights reserved.
2+
* SPDX-License-Identifier: BSD-3-Clause
3+
******************************************************************************
4+
* @attention
55
*
6-
* Redistribution and use in source and binary forms, with or without
7-
* modification, are permitted provided that the following conditions are met:
6+
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
7+
* All rights reserved.</center></h2>
88
*
9-
* 1. Redistributions of source code must retain the above copyright notice,
10-
* this list of conditions and the following disclaimer.
11-
* 2. Redistributions in binary form must reproduce the above copyright notice,
12-
* this list of conditions and the following disclaimer in the documentation
13-
* and/or other materials provided with the distribution.
14-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
15-
* may be used to endorse or promote products derived from this software
16-
* without specific prior written permission.
9+
* This software component is licensed by ST under BSD 3-Clause license,
10+
* the "License"; You may not use this file except in compliance with the
11+
* License. You may obtain a copy of the License at:
12+
* opensource.org/licenses/BSD-3-Clause
1713
*
18-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28-
*******************************************************************************
29-
*/
14+
******************************************************************************
15+
*/
3016

3117
#ifndef MBED_CMSIS_NVIC_H
3218
#define MBED_CMSIS_NVIC_H
3319

34-
// CORE: 16 vectors (= 64 bytes from 0x00 to 0x3F)
35-
// MCU Peripherals: 43 vectors (= 172 bytes from 0x40 to 0xEB)
36-
// Total: 236 bytes to be reserved in RAM (see scatter file)
37-
#define NVIC_NUM_VECTORS (16 + 43)
38-
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
20+
#if !defined(MBED_ROM_START)
21+
#define MBED_ROM_START 0x8000000
22+
#endif
23+
24+
#if !defined(MBED_ROM_SIZE)
25+
#define MBED_ROM_SIZE 0x20000 // 128 KB
26+
#endif
27+
28+
#if !defined(MBED_RAM_START)
29+
#define MBED_RAM_START 0x20000000
30+
#endif
31+
32+
#if !defined(MBED_RAM_SIZE)
33+
#define MBED_RAM_SIZE 0x5000 // 20 KB
34+
#endif
35+
36+
#define NVIC_NUM_VECTORS 59
37+
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
3938

4039
#endif

‎targets/targets.json

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1358,6 +1358,9 @@
13581358
"macro_name": "CLOCK_SOURCE"
13591359
}
13601360
},
1361+
"overrides": {
1362+
"tickless-from-us-ticker": true
1363+
},
13611364
"detect_code": [
13621365
"0700"
13631366
],

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