Updates after rebase

- postbuild: Use find_secure_image and update prebuilt binaries
- Add CMSIS driver headers
- Align with 2-region memory model

Author: Michael Schwarcz

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct

@@ -30,27 +30,35 @@
 #endif
 
 #if !defined(MBED_RAM_START)
-  #define MBED_RAM_START    NVIC_RAM_VECTOR_LIMIT                   // 0x20010170
+  #define MBED_RAM_START    NS_DATA_START
 #endif
 
 #if !defined(MBED_RAM_SIZE)
-  #define MBED_RAM_SIZE     (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE)   // 0xfe90
+  #define MBED_RAM_SIZE     NS_DATA_SIZE
 #endif
 
-LR_CODE MBED_ROM_START NS_CODE_SIZE {
-    ER_CODE MBED_ROM_START NS_CODE_SIZE {
+#define VECTOR_SIZE         NVIC_RAM_VECTOR_SIZE
+
+#if !defined(MBED_BOOT_STACK_SIZE)
+  #define MBED_BOOT_STACK_SIZE      0x400
+#endif
+
+#define RAM_FIXED_SIZE    (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
+
+LR_CODE  MBED_ROM_START  MBED_ROM_SIZE  {
+    ER_CODE  MBED_ROM_START  MBED_ROM_SIZE  {
         *.o (VECTOR +First)
         .ANY (+RO)
     }
 
-    RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE {
+    RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {
         * (+RW) ; RW data that gets copied from Flash to SRAM
         * (+ZI) ; ZI data that gets initialised to zero in SRAM
     }
 
-    HEAP_STACK +0 ALIGN 8 {
-        startup_cmsdk_musca_ns.o (HEAP, +First)
-        startup_cmsdk_musca_ns.o (STACK, +Last)
+    ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
     }
-}
 
+    ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
+    }
+}

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S

@@ -23,27 +23,7 @@
 ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
 ;*/
 
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00001000
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-__stack_base
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-; <h> Heap Configuration
-;   <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-Heap_Size       EQU     0x00001000
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
+__initial_sp        EQU     0x20020000  ; Top of RAM
 
 ; Vector Table Mapped to Address 0 at Reset
 
@@ -257,31 +237,4 @@ $handler_name   PROC
 
                 ALIGN
 
-; User Initial Stack & Heap
-
-                EXPORT  __stack_base
-                EXPORT  __initial_sp
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-
-__user_initial_stackheap PROC
-                LDR     R0, =  Heap_Mem
-                LDR     R1, = (Stack_Mem + Stack_Size)
-                LDR     R2, = (Heap_Mem +  Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDP
-
-                ENDIF
-
-                ALIGN
-
                 END

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld

@@ -25,15 +25,19 @@
 #include "../../../partition/region_defs.h"
 #include "../cmsis_nvic.h"
 
+/* Stack size is 1K for Mbed-OS */
+#if !defined(MBED_BOOT_STACK_SIZE)
+  #define MBED_BOOT_STACK_SIZE      0x400
+#endif
+
 MEMORY
 {
   CODE_RAM (rx)  : ORIGIN = NS_CODE_START, LENGTH = ((TOTAL_CODE_SRAM_SIZE / 2) - BL2_HEADER_SIZE)
   /* Vector table is copied to RAM, so RAM address needs to be adjusted */
   RAM   (rwx) : ORIGIN = NVIC_RAM_VECTOR_LIMIT, LENGTH = (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE)
 }
 
-__heap_size__  = 0x00003000;
-__stack_size__ = 0x00003000;
+__stack_size__ = MBED_BOOT_STACK_SIZE;
 
 /* Library configurations */
 GROUP(libgcc.a libc.a libm.a libnosys.a)
@@ -68,9 +72,9 @@ SECTIONS
     __exidx_end = .;
 
     /* The text section is loaded into Flash but runs from SRAM
-     * The load address is aligned to 4 bytes
+     * The load address is aligned to 8 bytes
      */
-    .text : ALIGN(4)
+    .text : ALIGN(8)
     {
         *(.text*)
 
@@ -92,7 +96,7 @@ SECTIONS
 
         KEEP(*(.eh_frame*))
     } >CODE_RAM
-    . = ALIGN(4); /* This alignment is needed to make the section size 4 bytes aligned */
+    . = ALIGN(8); /* This alignment is needed to make the section size 8 bytes aligned */
 
     /* Create same symbols that armclang does so that in the c files
      * we do not have to deal with the compiler type
@@ -109,7 +113,7 @@ SECTIONS
      * define __STARTUP_COPY_MULTIPLE in startup_cmsdk_musca_ns.S */
     .copy.table :
     {
-        . = ALIGN(4);
+        . = ALIGN(8);
         __copy_table_start__ = .;
         LONG (__etext)
         LONG (__data_start__)
@@ -124,7 +128,7 @@ SECTIONS
      * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_cmsdk_musca_ns.S */
     .zero.table :
     {
-        . = ALIGN(4);
+        . = ALIGN(8);
         __zero_table_start__ = .;
         LONG (__bss_start__)
         LONG (__bss_end__ - __bss_start__)
@@ -135,61 +139,52 @@ SECTIONS
 
     __etext = .;
 
-    .data : ALIGN(4)
+    .data : ALIGN(8)
     {
         __data_start__ = .;
         *(vtable)
         *(.data*)
 
-        . = ALIGN(4);
+        . = ALIGN(8);
         /* preinit data */
         PROVIDE_HIDDEN (__preinit_array_start = .);
         KEEP(*(.preinit_array))
         PROVIDE_HIDDEN (__preinit_array_end = .);
 
-        . = ALIGN(4);
+        . = ALIGN(8);
         /* init data */
         PROVIDE_HIDDEN (__init_array_start = .);
         KEEP(*(SORT(.init_array.*)))
         KEEP(*(.init_array))
         PROVIDE_HIDDEN (__init_array_end = .);
 
 
-        . = ALIGN(4);
+        . = ALIGN(8);
         /* finit data */
         PROVIDE_HIDDEN (__fini_array_start = .);
         KEEP(*(SORT(.fini_array.*)))
         KEEP(*(.fini_array))
         PROVIDE_HIDDEN (__fini_array_end = .);
 
         KEEP(*(.jcr*))
-        . = ALIGN(4);
+        . = ALIGN(8);
         /* All data end */
         __data_end__ = .;
 
     } > RAM AT>CODE_RAM
 
     .bss :
     {
-        . = ALIGN(4);
+        . = ALIGN(8);
         __bss_start__ = .;
         *(.bss*)
         *(COMMON)
-        . = ALIGN(4);
+        . = ALIGN(8);
         __bss_end__ = .;
     } > RAM
 
     bss_size = __bss_end__ - __bss_start__;
 
-    .heap (COPY):
-    {
-        __HeapBase = .;
-        __end__ = .;
-        end = __end__;
-        KEEP(*(.heap*))
-        __HeapLimit = .;
-    } > RAM
-
     .stack :
     {
         . = ALIGN(8);
@@ -198,20 +193,20 @@ SECTIONS
         . += __stack_size__;
         __StackTop = .;
     } > RAM
+    PROVIDE(__stack = __StackTop);
 
-    .heap :
+    .heap (COPY):
     {
         . = ALIGN(8);
-        __end__ = .;
-        PROVIDE(end = .);
         __HeapBase = .;
-        . += __heap_size__;
+        __end__ = .;
+        end = __end__;
+        KEEP(*(.heap*))
+        . += (ORIGIN(RAM) + LENGTH(RAM) - .);
         __HeapLimit = .;
         __heap_limit = .; /* Add for _sbrk */
     } > RAM
 
-    PROVIDE(__stack = __StackTop);
-
     /* Check if data + heap + stack exceeds RAM limit */
     ASSERT(__StackTop <= (NS_DATA_START + NS_DATA_SIZE), "RAM region overflowed")
 }

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmse_lib.o

@@ -21,5 +21,5 @@
 
 void NVIC_SystemReset(void)
 {
-    psa_system_reset();
+    mbed_psa_system_reset();
 }

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic_virtual.c

@@ -0,0 +1,49 @@
+Permissive Binary License
+
+Version 1.0, December 2018
+
+Redistribution.  Redistribution and use in binary form, without
+modification, are permitted provided that the following conditions are
+met:
+
+1) Redistributions must reproduce the above copyright notice and the
+   following disclaimer in the documentation and/or other materials
+   provided with the distribution.
+
+2) Unless to the extent explicitly permitted by law, no reverse
+   engineering, decompilation, or disassembly of this software is
+   permitted.
+
+3) Redistribution as part of a software development kit must include the
+   accompanying file named DEPENDENCIES and any dependencies listed in
+   that file.
+
+4) Neither the name of the copyright holder nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+Limited patent license. The copyright holders (and contributors) grant a
+worldwide, non-exclusive, no-charge, royalty-free patent license to
+make, have made, use, offer to sell, sell, import, and otherwise
+transfer this software, where such license applies only to those patent
+claims licensable by the copyright holders (and contributors) that are
+necessarily infringed by this software. This patent license shall not
+apply to any combinations that include this software.  No hardware is
+licensed hereunder.
+
+If you institute patent litigation against any entity (including a
+cross-claim or counterclaim in a lawsuit) alleging that the software
+itself infringes your patent(s), then your rights granted under this
+license shall terminate as of the date such litigation is filed.
+
+DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
+NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/LICENSE-permissive-binary-license-1.0.txt

@@ -0,0 +1,33 @@
+# MUSCA_A1_NS prebuilt secure binaries
+
+This directory tree contains Secure images released under Permissive Binary License.
+
+Built by mbed-cli using GNU Arm Embedded - version 6.3.1
+
+These images were compiled by the following command:
+
+## tfm.bin
+
+```sh
+mbed compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json --profile release
+```
+
+## spm_smoke.bin
+
+```sh
+mbed test --compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json -n tests-psa-spm_smoke -DUSE_PSA_TEST_PARTITIONS -DUSE_SMOKE_TESTS_PART1 --profile release
+```
+
+## spm_client.bin
+
+```sh
+mbed test --compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json -n tests-psa-spm_client -DUSE_PSA_TEST_PARTITIONS -DUSE_CLIENT_TESTS_PART1 --profile release
+```
+
+## spm_server.bin
+
+```sh
+mbed test --compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json -n tests-psa-spm_server -DUSE_PSA_TEST_PARTITIONS -DUSE_SERVER_TESTS_PART1 -DUSE_SERVER_TESTS_PART2 --profile release
+```
+
+To update the prebuilt binaries run the previous commands.