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[M487] Move target configuration from mbed_lib.json to targets.json
1 parent afb5aba commit 9ac0d90

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4 files changed

+41
-44
lines changed

4 files changed

+41
-44
lines changed

targets/TARGET_NUVOTON/TARGET_M480/device/system_M480.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,11 +85,11 @@ void SystemInit (void)
8585
SPIM_ENABLE_CCM();
8686
while (! SPIM_IS_CCM_EN());
8787

88-
#ifndef MBED_CONF_M480_CTRL01_ENABLE
89-
#define MBED_CONF_M480_CTRL01_ENABLE 1
88+
#ifndef MBED_CONF_TARGET_CTRL01_ENABLE
89+
#define MBED_CONF_TARGET_CTRL01_ENABLE 1
9090
#endif
9191

92-
#if (! MBED_CONF_M480_CTRL01_ENABLE)
92+
#if (! MBED_CONF_TARGET_CTRL01_ENABLE)
9393
M32(0x4000c018) |= 0x00000080;
9494
#endif
9595
}

targets/TARGET_NUVOTON/TARGET_M480/gpio_irq_api.c

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -57,23 +57,23 @@ static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
5757

5858
#define NU_MAX_PORT (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
5959

60-
#ifndef MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_ENABLE
61-
#define MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_ENABLE 0
60+
#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
61+
#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE 0
6262
#endif
6363

64-
#ifndef MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
65-
#define MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
64+
#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
65+
#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
6666
#endif
6767
static PinName gpio_irq_debounce_arr[] = {
68-
MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
68+
MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
6969
};
7070

71-
#ifndef MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
72-
#define MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_LIRC
71+
#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
72+
#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_LIRC
7373
#endif
7474

75-
#ifndef MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
76-
#define MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
75+
#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
76+
#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
7777
#endif
7878

7979
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
@@ -97,12 +97,12 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
9797
// There is no need to call gpio_set() redundantly.
9898

9999
{
100-
#if MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_ENABLE
100+
#if MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
101101
// Suppress compiler warning
102102
(void) gpio_irq_debounce_arr;
103103

104104
// Configure de-bounce clock source and sampling cycle time
105-
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
105+
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
106106
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
107107
#else
108108
// Enable de-bounce if the pin is in the de-bounce enable list
@@ -119,7 +119,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
119119
if (pin_index == pin_index_debunce &&
120120
port_index == port_index_debounce) {
121121
// Configure de-bounce clock source and sampling cycle time
122-
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_M480_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
122+
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
123123
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
124124
break;
125125
}

targets/TARGET_NUVOTON/TARGET_M480/mbed_lib.json

Lines changed: 0 additions & 29 deletions
This file was deleted.

targets/targets.json

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3263,6 +3263,32 @@
32633263
"extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO"],
32643264
"is_disk_virtual": true,
32653265
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
3266+
"config": {
3267+
"gpio-irq-debounce-enable": {
3268+
"help": "Enable GPIO IRQ debounce",
3269+
"value": 0
3270+
},
3271+
"gpio-irq-debounce-enable-list": {
3272+
"help": "Comma separated pin list to enable GPIO IRQ debounce",
3273+
"value": "NC"
3274+
},
3275+
"gpio-irq-debounce-clock-source": {
3276+
"help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
3277+
"value": "GPIO_DBCTL_DBCLKSRC_LIRC"
3278+
},
3279+
"gpio-irq-debounce-sample-rate": {
3280+
"help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
3281+
"value": "GPIO_DBCTL_DBCLKSEL_16"
3282+
},
3283+
"usb-device-hsusbd": {
3284+
"help": "Select high-speed USB device or not",
3285+
"value": 1
3286+
},
3287+
"ctrl01-enable": {
3288+
"help": "Enable control_01",
3289+
"value": 0
3290+
}
3291+
},
32663292
"inherits": ["Target"],
32673293
"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
32683294
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN"],

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