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jeromecoutantjeromecoutant
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STM32H7 baremetal support
1 parent 739b204 commit 9b819c7

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11 files changed

+265
-142
lines changed

11 files changed

+265
-142
lines changed

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM/stm32h743xI.sct

Lines changed: 23 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
#! armcc -E
22
; Scatter-Loading Description File
3+
;
4+
; SPDX-License-Identifier: BSD-3-Clause
35
;******************************************************************************
46
;* @attention
57
;*
6-
;* Copyright (c) 2018-2019 STMicroelectronics.
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
79
;* All rights reserved.
810
;*
911
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,45 +15,46 @@
1315
;*
1416
;******************************************************************************
1517

18+
#include "../cmsis_nvic.h"
19+
1620
#if !defined(MBED_APP_START)
17-
#define MBED_APP_START 0x08000000
21+
#define MBED_APP_START MBED_ROM_START
1822
#endif
1923

2024
#if !defined(MBED_APP_SIZE)
21-
#define MBED_APP_SIZE 0x200000
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
2226
#endif
2327

2428
#if !defined(MBED_BOOT_STACK_SIZE)
25-
#define MBED_BOOT_STACK_SIZE 0x400
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#define MBED_BOOT_STACK_SIZE 0x400
2631
#endif
2732

28-
#define Stack_Size MBED_BOOT_STACK_SIZE
33+
/* Round up VECTORS_SIZE to 8 bytes */
34+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
2935

30-
#define MBED_RAM_START 0x24000000
31-
#define MBED_RAM_SIZE 0x80000
32-
#define MBED_VECTTABLE_RAM_START 0x20000000
33-
#define MBED_VECTTABLE_RAM_SIZE 0x298
34-
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
36+
#define MBED_CRASH_REPORT_RAM_START (NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE)
3537
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
36-
#define MBED_RAM0_START (MBED_RAM_START)
37-
#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
3838

39-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
39+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
4040

41-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
42-
*.o (RESET, +First)
43-
*(InRoot$$Sections)
44-
.ANY (+RO)
41+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
42+
*.o (RESET, +First)
43+
*(InRoot$$Sections)
44+
.ANY (+RO)
4545
}
4646

4747
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
4848
}
4949

50-
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
51-
.ANY (+RW +ZI)
50+
RW_IRAM1 (MBED_RAM_START) { ; RW data
51+
.ANY (+RW +ZI)
52+
}
53+
54+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
5255
}
5356

54-
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
57+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
5558
}
5659

5760
RW_DMARxDscrTab 0x30040000 0x60 {

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/cmsis_nvic.h

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
/* mbed Microcontroller Library
2+
* SPDX-License-Identifier: BSD-3-Clause
3+
******************************************************************************
4+
* @attention
5+
*
6+
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
7+
* All rights reserved.</center></h2>
8+
*
9+
* This software component is licensed by ST under BSD 3-Clause license,
10+
* the "License"; You may not use this file except in compliance with the
11+
* License. You may obtain a copy of the License at:
12+
* opensource.org/licenses/BSD-3-Clause
13+
*
14+
******************************************************************************
15+
*/
16+
17+
#ifndef MBED_CMSIS_NVIC_H
18+
#define MBED_CMSIS_NVIC_H
19+
20+
#if !defined(MBED_ROM_START)
21+
#define MBED_ROM_START 0x8000000
22+
#endif
23+
24+
#if !defined(MBED_ROM_SIZE)
25+
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
26+
#endif
27+
28+
#if !defined(MBED_RAM_START)
29+
#define MBED_RAM_START 0x24000000
30+
#endif
31+
32+
#if !defined(MBED_RAM_SIZE)
33+
#define MBED_RAM_SIZE 0x80000 // 128 KB
34+
#endif
35+
36+
#define NVIC_NUM_VECTORS 166
37+
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
38+
39+
#endif

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct

Lines changed: 22 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
#! armcc -E
22
; Scatter-Loading Description File
3+
;
4+
; SPDX-License-Identifier: BSD-3-Clause
35
;******************************************************************************
46
;* @attention
57
;*
6-
;* Copyright (c) 2019 STMicroelectronics.
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
79
;* All rights reserved.
810
;*
911
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,39 +15,39 @@
1315
;*
1416
;******************************************************************************
1517

18+
#include "../cmsis_nvic.h"
19+
1620
#if !defined(MBED_APP_START)
17-
#define MBED_APP_START 0x08100000
21+
#define MBED_APP_START MBED_ROM_START
1822
#endif
1923

2024
#if !defined(MBED_APP_SIZE)
21-
#define MBED_APP_SIZE 0x100000
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
2226
#endif
2327

2428
#if !defined(MBED_BOOT_STACK_SIZE)
25-
#define MBED_BOOT_STACK_SIZE 0x400
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#define MBED_BOOT_STACK_SIZE 0x400
2631
#endif
2732

28-
#define Stack_Size MBED_BOOT_STACK_SIZE
33+
/* Round up VECTORS_SIZE to 8 bytes */
34+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
2935

30-
#define MBED_RAM_START 0x10000000
31-
#define MBED_RAM_SIZE 0x48000
32-
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
33-
#define MBED_VECTTABLE_RAM_SIZE 0x298
34-
#define MBED_RAM0_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
35-
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE)
36+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
3637

37-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
38+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
39+
*.o (RESET, +First)
40+
*(InRoot$$Sections)
41+
.ANY (+RO)
42+
}
3843

39-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
40-
*.o (RESET, +First)
41-
*(InRoot$$Sections)
42-
.ANY (+RO)
44+
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
45+
.ANY (+RW +ZI)
4346
}
44-
45-
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
46-
.ANY (+RW +ZI)
47+
48+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
4749
}
4850

49-
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
51+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
5052
}
5153
}

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/cmsis_nvic.h

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
/* mbed Microcontroller Library
2+
* SPDX-License-Identifier: BSD-3-Clause
3+
******************************************************************************
4+
* @attention
5+
*
6+
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
7+
* All rights reserved.</center></h2>
8+
*
9+
* This software component is licensed by ST under BSD 3-Clause license,
10+
* the "License"; You may not use this file except in compliance with the
11+
* License. You may obtain a copy of the License at:
12+
* opensource.org/licenses/BSD-3-Clause
13+
*
14+
******************************************************************************
15+
*/
16+
17+
#ifndef MBED_CMSIS_NVIC_H
18+
#define MBED_CMSIS_NVIC_H
19+
20+
#if !defined(MBED_ROM_START)
21+
#define MBED_ROM_START 0x8100000
22+
#endif
23+
24+
#if !defined(MBED_ROM_SIZE)
25+
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
26+
#endif
27+
28+
#if !defined(MBED_RAM_START)
29+
#define MBED_RAM_START 0x10000000
30+
#endif
31+
32+
#if !defined(MBED_RAM_SIZE)
33+
#define MBED_RAM_SIZE 0x48000 // 288 KB
34+
#endif
35+
36+
37+
#define NVIC_NUM_VECTORS 166
38+
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
39+
40+
#endif

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/TOOLCHAIN_ARM/stm32h745xI.sct

Lines changed: 21 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
#! armcc -E
22
; Scatter-Loading Description File
3+
;
4+
; SPDX-License-Identifier: BSD-3-Clause
35
;******************************************************************************
46
;* @attention
57
;*
6-
;* Copyright (c) 2018-2019 STMicroelectronics.
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
79
;* All rights reserved.
810
;*
911
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,40 +15,40 @@
1315
;*
1416
;******************************************************************************
1517

18+
#include "../cmsis_nvic.h"
19+
1620
#if !defined(MBED_APP_START)
17-
#define MBED_APP_START 0x08000000
21+
#define MBED_APP_START MBED_ROM_START
1822
#endif
1923

2024
#if !defined(MBED_APP_SIZE)
21-
#define MBED_APP_SIZE 0x100000
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
2226
#endif
2327

2428
#if !defined(MBED_BOOT_STACK_SIZE)
25-
#define MBED_BOOT_STACK_SIZE 0x400
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#define MBED_BOOT_STACK_SIZE 0x400
2631
#endif
2732

28-
#define Stack_Size MBED_BOOT_STACK_SIZE
33+
/* Round up VECTORS_SIZE to 8 bytes */
34+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
2935

30-
#define MBED_RAM_START 0x24000000
31-
#define MBED_RAM_SIZE 0x80000
32-
#define MBED_VECTTABLE_RAM_START 0x20000000
33-
#define MBED_VECTTABLE_RAM_SIZE 0x298
34-
#define MBED_RAM0_START (MBED_RAM_START)
35-
#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
36+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
3637

37-
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
38+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
39+
*.o (RESET, +First)
40+
*(InRoot$$Sections)
41+
.ANY (+RO)
42+
}
3843

39-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
40-
*.o (RESET, +First)
41-
*(InRoot$$Sections)
42-
.ANY (+RO)
44+
RW_IRAM1 (MBED_RAM_START) { ; RW data
45+
.ANY (+RW +ZI)
4346
}
4447

45-
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
46-
.ANY (+RW +ZI)
48+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
4749
}
4850

49-
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
51+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
5052
}
5153

5254
RW_DMARxDscrTab 0x30040000 0x60 {

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h renamed to ‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/cmsis_nvic.h

Lines changed: 19 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,24 @@
1616
#ifndef MBED_CMSIS_NVIC_H
1717
#define MBED_CMSIS_NVIC_H
1818

19-
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
20-
// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297
21-
// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM
22-
#define NVIC_NUM_VECTORS 166
23-
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM
19+
#if !defined(MBED_ROM_START)
20+
#define MBED_ROM_START 0x8000000
21+
#endif
22+
23+
#if !defined(MBED_ROM_SIZE)
24+
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
25+
#endif
26+
27+
#if !defined(MBED_RAM_START)
28+
#define MBED_RAM_START 0x24000000
29+
#endif
30+
31+
#if !defined(MBED_RAM_SIZE)
32+
#define MBED_RAM_SIZE 0x80000 // 512 KB
33+
#endif
34+
35+
36+
#define NVIC_NUM_VECTORS 166
37+
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
2438

2539
#endif

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