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kjbraceykjbracey
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MPU - use higher-level calls, fix ARMv8-M error
Switch to higher-level calls and macros, and fix an error in the ARMv8-M version - "inner" attributes were not being set correctly due to a copy/paste error - "outer" was being set twice. This means RAM would have been marked WTRA rather than WBWA for the inner cache. Slightly reduces ARMv7-M init code size by feeding region number into RBAR instead of using RNR.
1 parent 2b5518a commit 9e30001

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2 files changed

+95
-93
lines changed

2 files changed

+95
-93
lines changed

‎hal/mpu/mbed_mpu_v7m.c

Lines changed: 33 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -74,13 +74,12 @@ void mbed_mpu_init()
7474
* 0xE0000000 - 0xFFFFFFFF System No
7575
*/
7676

77-
// Select region 1 and used it for the WT rom region
78-
// - RAM 0x00000000 to MBED_MPU_ROM_END
79-
MPU->RNR = 0;
80-
// Set address to 0
81-
MPU->RBAR = 0;
82-
// Configure and enable region
83-
MPU->RASR =
77+
// Select region 0 and use it for the WT read-only rom region
78+
// - Code 0x00000000 to MBED_MPU_ROM_END
79+
ARM_MPU_SetRegion(
80+
ARM_MPU_RBAR(
81+
0, // Region
82+
0x00000000), // Base
8483
ARM_MPU_RASR(
8584
0, // DisableExec
8685
ARM_MPU_AP_RO, // AccessPermission
@@ -97,16 +96,15 @@ void mbed_mpu_init()
9796
((MBED_MPU_ROM_END >= 0x14000000) ? 0 : (1 << 5)) |
9897
((MBED_MPU_ROM_END >= 0x18000000) ? 0 : (1 << 6)) |
9998
((MBED_MPU_ROM_END >= 0x1C000000) ? 0 : (1 << 7)),
100-
ARM_MPU_REGION_SIZE_512MB // Size
101-
);
102-
103-
// Select region 1 and used it for the WT rom region
104-
// - RAM MBED_MPU_ROM_END + 1 to 0x1FFFFFFF
105-
MPU->RNR = 1;
106-
// Set address to 0
107-
MPU->RBAR = 0;
108-
// Configure and enable region
109-
MPU->RASR =
99+
ARM_MPU_REGION_SIZE_512MB) // Size
100+
);
101+
102+
// Select region 1 and use it for a WT ram region in the Code area
103+
// - Code MBED_MPU_ROM_END + 1 to 0x1FFFFFFF
104+
ARM_MPU_SetRegion(
105+
ARM_MPU_RBAR(
106+
1, // Region
107+
0x00000000), // Base
110108
ARM_MPU_RASR(
111109
1, // DisableExec
112110
ARM_MPU_AP_FULL, // AccessPermission
@@ -123,17 +121,16 @@ void mbed_mpu_init()
123121
((MBED_MPU_RAM_START <= 0x18000000) ? 0 : (1 << 5)) |
124122
((MBED_MPU_RAM_START <= 0x1C000000) ? 0 : (1 << 6)) |
125123
((MBED_MPU_RAM_START <= 0x20000000) ? 0 : (1 << 7)),
126-
ARM_MPU_REGION_SIZE_512MB // Size
127-
);
124+
ARM_MPU_REGION_SIZE_512MB) // Size
125+
);
128126

129-
// Select region 2 and used it for WBWA ram regions
127+
// Select region 2 and use it for WBWA ram regions
130128
// - SRAM 0x20000000 to 0x3FFFFFFF
131129
// - RAM 0x60000000 to 0x7FFFFFFF
132-
MPU->RNR = 2;
133-
// Set address to 0
134-
MPU->RBAR = 0;
135-
// Configure and enable region
136-
MPU->RASR =
130+
ARM_MPU_SetRegion(
131+
ARM_MPU_RBAR(
132+
2, // Region
133+
0x00000000), // Base
137134
ARM_MPU_RASR(
138135
1, // DisableExec
139136
ARM_MPU_AP_FULL, // AccessPermission
@@ -150,16 +147,15 @@ void mbed_mpu_init()
150147
(1 << 5) | // Disable Sub-region
151148
(1 << 6) | // Disable Sub-region
152149
(1 << 7), // Disable Sub-region
153-
ARM_MPU_REGION_SIZE_4GB // Size
154-
);
155-
156-
// Select region 3 and used it for the WT ram region
157-
// - RAM RAM 0x80000000 to 0x9FFFFFFF
158-
MPU->RNR = 3;
159-
// Set address
160-
MPU->RBAR = 0x80000000;
161-
// Configure and enable region
162-
MPU->RASR =
150+
ARM_MPU_REGION_SIZE_4GB) // Size
151+
);
152+
153+
// Select region 3 and use it for the WT ram region
154+
// - RAM 0x80000000 to 0x9FFFFFFF
155+
ARM_MPU_SetRegion(
156+
ARM_MPU_RBAR(
157+
3, // Region
158+
0x80000000), // Base
163159
ARM_MPU_RASR(
164160
1, // DisableExec
165161
ARM_MPU_AP_FULL, // AccessPermission
@@ -168,8 +164,8 @@ void mbed_mpu_init()
168164
1, // IsCacheable
169165
0, // IsBufferable
170166
~0U, // SubRegionDisable
171-
ARM_MPU_REGION_SIZE_512MB // Size
172-
);
167+
ARM_MPU_REGION_SIZE_512MB) // Size
168+
);
173169

174170
// Enable the MPU
175171
MPU->CTRL =

‎hal/mpu/mbed_mpu_v8m.c

Lines changed: 62 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ void mbed_mpu_init()
4747

4848
// Reset all mapping
4949
for (uint32_t i = 0; i < regions; i++) {
50-
ARM_MPU_ClrRegionEx(MPU, i);
50+
ARM_MPU_ClrRegion(i);
5151
}
5252

5353
/*
@@ -64,61 +64,67 @@ void mbed_mpu_init()
6464
* 0xE0000000 - 0xFFFFFFFF System No
6565
*/
6666

67-
uint32_t region;
68-
uint8_t outer;
69-
uint8_t inner;
70-
71-
region = 0;
72-
MPU->RNR = region;
73-
outer = 0xA; // Write-Through, Non-transient, Read-allocate
74-
inner = 0xA; // Write-Through, Non-transient, Read-allocate
75-
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0));
76-
MPU->RBAR = (0x00000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x00000000
77-
(0 << MPU_RBAR_SH_Pos) | // Not shareable
78-
(3 << MPU_RBAR_AP_Pos) | // RO allowed by all privilege levels
79-
(0 << MPU_RBAR_XN_Pos); // Execute Never disabled
80-
MPU->RLAR = (0x1FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x1FFFFFFF
81-
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number
82-
(1 << MPU_RLAR_EN_Pos); // Region enabled
83-
84-
region = 1;
85-
MPU->RNR = region;
86-
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate
87-
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate
88-
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0));
89-
MPU->RBAR = (0x20000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x20000000
90-
(0 << MPU_RBAR_SH_Pos) | // Not shareable
91-
(1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels
92-
(1 << MPU_RBAR_XN_Pos); // Execute Never enabled
93-
MPU->RLAR = (0x3FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x3FFFFFFF
94-
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number
95-
(1 << MPU_RLAR_EN_Pos); // Region enabled
96-
97-
region = 2;
98-
MPU->RNR = region;
99-
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate
100-
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate
101-
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0));
102-
MPU->RBAR = (0x60000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x60000000
103-
(0 << MPU_RBAR_SH_Pos) | // Not shareable
104-
(1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels
105-
(1 << MPU_RBAR_XN_Pos); // Execute Never enabled
106-
MPU->RLAR = (0x7FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x7FFFFFFF
107-
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number
108-
(1 << MPU_RLAR_EN_Pos); // Region enabled
109-
110-
region = 3;
111-
MPU->RNR = region;
112-
outer = 0xA; // Write-Through, Non-transient, Read-allocate
113-
inner = 0xA; // Write-Through, Non-transient, Read-allocate
114-
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0));
115-
MPU->RBAR = (0x80000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x80000000
116-
(0 << MPU_RBAR_SH_Pos) | // Not shareable
117-
(1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels
118-
(1 << MPU_RBAR_XN_Pos); // Execute Never enabled
119-
MPU->RLAR = (0x9FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x9FFFFFFF
120-
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number
121-
(1 << MPU_RLAR_EN_Pos); // Region enabled
67+
const uint8_t WTRA = ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0); // Non-transient, Write-Through, Read-allocate, Not Write-allocate
68+
const uint8_t WBWARA = ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1); // Non-transient, Write-Back, Read-allocate, Write-allocate
69+
enum {
70+
AttrIndex_WTRA,
71+
AttrIndex_WBWARA,
72+
};
73+
74+
ARM_MPU_SetMemAttr(AttrIndex_WTRA, ARM_MPU_ATTR(WTRA, WTRA));
75+
ARM_MPU_SetMemAttr(AttrIndex_WBWARA, ARM_MPU_ATTR(WBWARA, WBWARA));
76+
77+
ARM_MPU_SetRegion(
78+
0, // Region
79+
ARM_MPU_RBAR(
80+
0x00000000, // Base
81+
ARM_MPU_SH_NON, // Non-shareable
82+
1, // Read-Only
83+
1, // Non-Privileged
84+
0), // Execute Never disabled
85+
ARM_MPU_RLAR(
86+
0x1FFFFFFF, // Limit
87+
AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
88+
);
89+
90+
ARM_MPU_SetRegion(
91+
1, // Region
92+
ARM_MPU_RBAR(
93+
0x20000000, // Base
94+
ARM_MPU_SH_NON, // Non-shareable
95+
0, // Read-Write
96+
1, // Non-Privileged
97+
1), // Execute Never enabled
98+
ARM_MPU_RLAR(
99+
0x3FFFFFFF, // Limit
100+
AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate
101+
);
102+
103+
ARM_MPU_SetRegion(
104+
2, // Region
105+
ARM_MPU_RBAR(
106+
0x60000000, // Base
107+
ARM_MPU_SH_NON, // Non-shareable
108+
0, // Read-Write
109+
1, // Non-Privileged
110+
1), // Execute Never enabled
111+
ARM_MPU_RLAR(
112+
0x7FFFFFFF, // Limit
113+
AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate
114+
);
115+
116+
ARM_MPU_SetRegion(
117+
3, // Region
118+
ARM_MPU_RBAR(
119+
0x80000000, // Base
120+
ARM_MPU_SH_NON, // Non-shareable
121+
0, // Read-Write
122+
1, // Non-Privileged
123+
1), // Execute Never enabled
124+
ARM_MPU_RLAR(
125+
0x9FFFFFFF, // Limit
126+
AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
127+
);
122128

123129
// Enable the MPU
124130
MPU->CTRL =

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