Remove M453 and uvisor. Replace __disable_irq() with critical_section API

1. Remove M453. It is not to support in this commit.
2. Remove uvisor. It is incomplete and not to support in this commit.
3. Replace __disable_irq() with critical_section APIs.

Author: ccli8

hal/targets/hal/TARGET_NUVOTON/TARGET_NUC472/gpio_irq_api.c

@@ -22,7 +22,6 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "PeripheralPins.h"
-//#include "uvisor-lib/uvisor-lib.h"
 #include "nu_bitutil.h"
 
 #define NU_MAX_PIN_PER_PORT     16

hal/targets/hal/TARGET_NUVOTON/TARGET_NUC472/i2c_api.c

@@ -24,7 +24,7 @@
 #include "nu_modutil.h"
 #include "nu_miscutil.h"
 #include "nu_bitutil.h"
-//#include "uvisor-lib/uvisor-lib.h"
+#include "critical.h"
 
 #define NU_I2C_DEBUG    0
 
@@ -309,42 +309,39 @@ static void i2c_enable_int(i2c_t *obj)
     I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
     const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
 
-    uint32_t _state = __get_PRIMASK();
-    __disable_irq();
+    core_util_critical_section_enter();
 
     // Enable I2C interrupt
     NVIC_EnableIRQ(modinit->irq_n);
     obj->i2c.inten = 1;
 
-    __set_PRIMASK(_state);
+    core_util_critical_section_exit();
 }
 
 static void i2c_disable_int(i2c_t *obj)
 {
     I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
     const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
 
-    uint32_t _state = __get_PRIMASK();
-    __disable_irq();
+    core_util_critical_section_enter();
 
     // Disable I2C interrupt
     NVIC_DisableIRQ(modinit->irq_n);
     obj->i2c.inten = 0;
 
-    __set_PRIMASK(_state);
+    core_util_critical_section_exit();
 }
 
 static int i2c_set_int(i2c_t *obj, int inten)
 {
     I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
     int inten_back;
 
-    uint32_t _state = __get_PRIMASK();
-    __disable_irq();
+    core_util_critical_section_enter();
 
     inten_back = obj->i2c.inten;
 
-    __set_PRIMASK(_state);
+    core_util_critical_section_exit();
 
     if (inten) {
         i2c_enable_int(obj);

hal/targets/hal/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c

@@ -21,7 +21,7 @@
 #include "sleep_api.h"
 #include "nu_modutil.h"
 #include "nu_miscutil.h"
-//#include "uvisor-lib/uvisor-lib.h"
+#include "critical.h"
 
 // lp_ticker tick = us = timestamp
 // clock of timer peripheral = ms
@@ -118,8 +118,7 @@ timestamp_t lp_ticker_read()
         // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
         // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
         do {
-            uint32_t _state = __get_PRIMASK();
-            __disable_irq();
+            core_util_critical_section_enter();
 
             // NOTE: Order of reading minor_us/carry here is significant.
             minor_ms = TIMER_GetCounter(timer2_base) * MS_PER_TMR2_CLK;
@@ -132,7 +131,7 @@ timestamp_t lp_ticker_read()
                 major_minor_ms = (counter_major + carry) * MS_PER_TMR2_INT + minor_ms;
             }
 
-            __set_PRIMASK(_state);
+            core_util_critical_section_exit();
         }
         while (minor_ms == 0 || minor_ms == MS_PER_TMR2_INT);
 

hal/targets/hal/TARGET_NUVOTON/TARGET_NUC472/sleep.c

@@ -17,7 +17,6 @@
 #include "sleep_api.h"
 #include "serial_api.h"
 #include "lp_ticker_api.h"
-//#include "uvisor-lib/uvisor-lib.h"
 
 #if DEVICE_SLEEP
 
@@ -89,23 +88,13 @@ static void mbed_enter_sleep(struct sleep_s *obj)
 
     if (obj->powerdown) {   // Power-down mode (HIRC/HXT disabled, LIRC/LXT enabled)
         SYS_UnlockReg();
-#if YOTTA_CFG_UVISOR_PRESENT == 1
-        uvisor_write32(&SCB->SCR, uvisor_read32(&(SCB->SCR)) | SCB_SCR_SLEEPDEEP_Msk);
-        CLK->PWRCTL |= (CLK_PWRCTL_PDEN_Msk | CLK_PWRCTL_PDWKDLY_Msk);
-        __WFI();
-#else
         CLK_PowerDown();
-#endif
         SYS_LockReg();
     }
     else {  // CPU halt mode (HIRC/HXT enabled, LIRC/LXT enabled)
         // NOTE: NUC472's CLK_Idle() will also disable HIRC/HXT.
         SYS_UnlockReg();
-#if YOTTA_CFG_UVISOR_PRESENT == 1
-        uvisor_write32(&SCB->SCR, uvisor_read32(&(SCB->SCR)) & ~SCB_SCR_SLEEPDEEP_Msk);
-#else
         SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
-#endif
         CLK->PWRCTL &= ~CLK_PWRCTL_PDEN_Msk;
         __WFI();
         SYS_LockReg();

hal/targets/hal/TARGET_NUVOTON/TARGET_NUC472/spi_api.c

@@ -24,7 +24,6 @@
 #include "nu_modutil.h"
 #include "nu_miscutil.h"
 #include "nu_bitutil.h"
-//#include "uvisor-lib/uvisor-lib.h"
 
 #if DEVICE_SPI_ASYNCH
 #include "dma_api.h"

hal/targets/hal/TARGET_NUVOTON/TARGET_NUC472/us_ticker.c

@@ -19,6 +19,7 @@
 #include "mbed_assert.h"
 #include "nu_modutil.h"
 #include "nu_miscutil.h"
+#include "critical.h"
 
 #define US_PER_TICK             1
 
@@ -119,8 +120,7 @@ uint32_t us_ticker_read()
         // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
         // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
         do {
-            uint32_t _state = __get_PRIMASK();
-            __disable_irq();
+            core_util_critical_section_enter();
 
             // NOTE: Order of reading minor_us/carry here is significant.
             minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
@@ -133,7 +133,7 @@ uint32_t us_ticker_read()
                 major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
             }
 
-            __set_PRIMASK(_state);
+            core_util_critical_section_exit();
         }
         while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
 
@@ -171,22 +171,20 @@ void us_ticker_prepare_sleep(struct sleep_s *obj)
         obj->powerdown = ! cd_hires_tmr_armed;
     }
 
-    uint32_t _state = __get_PRIMASK();
-    __disable_irq();
+    core_util_critical_section_enter();
 
     if (obj->powerdown) {
         // NOTE: On entering power-down mode, HIRC/HXT will be disabled in normal mode, but not in ICE mode. This may cause confusion in development.
         // To not be inconsistent due to above, always disable clock source of normal counter, and then re-enable it and make compensation on wakeup from power-down.
         CLK_DisableModuleClock(timer0hires_modinit.clkidx);
     }
 
-     __set_PRIMASK(_state);
+    core_util_critical_section_exit();
 }
 
 void us_ticker_wakeup_from_sleep(struct sleep_s *obj)
 {
-    uint32_t _state = __get_PRIMASK();
-    __disable_irq();
+    core_util_critical_section_enter();
 
     if (obj->powerdown) {
         // Calculate power-down compensation
@@ -195,7 +193,7 @@ void us_ticker_wakeup_from_sleep(struct sleep_s *obj)
         CLK_EnableModuleClock(timer0hires_modinit.clkidx);
     }
 
-    __set_PRIMASK(_state);
+    core_util_critical_section_exit();
 }
 
 static void tmr0_vec(void)