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STM32WB15xC MCU support
1 parent 587eb41 commit 9f0ee46

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15 files changed

+270
-516
lines changed

15 files changed

+270
-516
lines changed

connectivity/drivers/ble/FEATURE_BLE/TARGET_STM32WB/HCIDriver.cpp

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,9 @@ static bool get_bd_address(uint8_t *bd_addr);
8484
static bool sysevt_wait(void);
8585
static bool sysevt_check(void);
8686

87+
#if DEVICE_FLASH
8788
extern int BLE_inited;
89+
#endif
8890

8991
namespace ble {
9092
namespace vendor {
@@ -490,6 +492,20 @@ class TransportDriver : public CordioHCITransportDriver {
490492
tr_info("WIRELESS COPROCESSOR FW VERSION ID = %d.%d.%d", p_wireless_info->VersionMajor, p_wireless_info->VersionMinor, p_wireless_info->VersionSub);
491493
tr_info("WIRELESS COPROCESSOR FW STACK TYPE = %d (ROM size 0x%x)", p_wireless_info->StackType, MBED_ROM_SIZE);
492494

495+
#if STM32WB15xx
496+
switch (p_wireless_info->StackType) {
497+
case INFO_STACK_TYPE_BLE_FULL:
498+
error("Wrong BLE FW\n");
499+
break;
500+
case INFO_STACK_TYPE_BLE_HCI:
501+
if (MBED_ROM_SIZE > 0x32800) {
502+
error("Wrong MBED_ROM_SIZE with HCI FW\n");
503+
}
504+
break;
505+
default:
506+
tr_error("StackType %u not expected\n", p_wireless_info->StackType);
507+
}
508+
#endif
493509
#if STM32WB55xx
494510
switch (p_wireless_info->StackType) {
495511
case INFO_STACK_TYPE_BLE_FULL:
@@ -681,8 +697,10 @@ class TransportDriver : public CordioHCITransportDriver {
681697
*/
682698
SHCI_C2_BLE_Init(&ble_init_cmd_packet);
683699

700+
#if DEVICE_FLASH
684701
/* Used in flash_api.c */
685702
BLE_inited = 1;
703+
#endif
686704
}
687705

688706
TL_CmdPacket_t *bleCmdBuf;

targets/TARGET_STM/TARGET_STM32WB/PeripheralNames.h

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,28 +35,42 @@ typedef enum {
3535
#define DEVICE_SPI_COUNT 2
3636
typedef enum {
3737
SPI_1 = (int)SPI1_BASE,
38-
SPI_2 = (int)SPI2_BASE
38+
#if defined SPI2_BASE
39+
SPI_2 = (int)SPI2_BASE,
40+
#endif
3941
} SPIName;
4042

4143
typedef enum {
4244
I2C_1 = (int)I2C1_BASE,
45+
#if defined I2C3_BASE
4346
I2C_3 = (int)I2C3_BASE
47+
#endif
4448
} I2CName;
4549

4650
typedef enum {
4751
PWM_1 = (int)TIM1_BASE,
52+
#if defined TIM2_BASE
4853
PWM_2 = (int)TIM2_BASE,
54+
#endif
55+
#if defined TIM16_BASE
4956
PWM_16 = (int)TIM16_BASE,
57+
#endif
58+
#if defined TIM17_BASE
5059
PWM_17 = (int)TIM17_BASE
60+
#endif
5161
} PWMName;
5262

63+
#if defined QUADSPI_R_BASE
5364
typedef enum {
5465
QSPI_1 = (int)QUADSPI_R_BASE
5566
} QSPIName;
67+
#endif
5668

69+
#if defined USB_BASE
5770
typedef enum {
5871
USB_FS = (int)USB_BASE,
5972
} USBName;
73+
#endif
6074

6175
#ifdef __cplusplus
6276
}

targets/TARGET_STM/TARGET_STM32WB/STM32Cube_FW/app_conf.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -148,7 +148,11 @@
148148
* Maximum number of simultaneous connections that the device will support.
149149
* Valid values are from 1 to 8
150150
*/
151+
#ifdef TARGET_MCU_STM32WB15xC
152+
#define CFG_BLE_NUM_LINK 4
153+
#else
151154
#define CFG_BLE_NUM_LINK 8
155+
#endif
152156

153157
/**
154158
* Maximum number of Services that can be stored in the GATT database.

targets/TARGET_STM/TARGET_STM32WB/STM32Cube_FW/stm32_lpm_if.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,11 @@ void PWR_EnterStopMode( void )
122122
/************************************************************************************
123123
* ENTER STOP MODE
124124
***********************************************************************************/
125+
#if defined(PWR_SUPPORT_STOP2)
125126
LL_PWR_SetPowerMode( LL_PWR_MODE_STOP2 );
127+
#else
128+
LL_PWR_SetPowerMode( LL_PWR_MODE_STOP1 );
129+
#endif
126130

127131
LL_LPM_EnableDeepSleep( ); /**< Set SLEEPDEEP bit of Cortex System Control Register */
128132

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB15xC/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ target_include_directories(mbed-stm32wb15xc
1919
target_sources(mbed-stm32wb15xc
2020
INTERFACE
2121
${STARTUP_FILE}
22+
system_clock.c
2223
)
2324

2425
mbed_set_linker_script(mbed-stm32wb15xc ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB15xC/TOOLCHAIN_ARM/stm32wb15xc.sct

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,9 @@
2222
#endif
2323

2424
#if !defined(MBED_APP_SIZE)
25-
#define MBED_APP_SIZE MBED_ROM_SIZE
25+
// MBED_APP_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
26+
// Size is defined in json with "mbed_rom_size"
27+
#define MBED_APP_SIZE MBED_ROM_SIZE
2628
#endif
2729

2830
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
@@ -37,6 +39,7 @@
3739
/* Round up VECTORS_SIZE to 8 bytes */
3840
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
3941

42+
; RAM_SIZE = 12KB SRAM (0x3000) + Shared mem (part of SRAM2)
4043
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
4144

4245
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
@@ -49,9 +52,17 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
4952
.ANY (+RW +ZI)
5053
}
5154

52-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
55+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + 0x3000 - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
5356
}
5457

55-
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
58+
ARM_LIB_STACK (MBED_RAM_START + 0x3000) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
5659
}
60+
61+
; SRAM2 - Shared memory
62+
RW_IRAM2 0x20030000 0x2800 { ; RW data
63+
*(MAPPING_TABLE)
64+
*(MB_MEM1)
65+
*(MB_MEM2)
66+
}
67+
5768
}

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB15xC/TOOLCHAIN_GCC_ARM/stm32wb15xc.ld

Lines changed: 21 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,9 @@
2323
#endif
2424

2525
#if !defined(MBED_APP_SIZE)
26-
#define MBED_APP_SIZE MBED_ROM_SIZE
26+
/* MBED_APP_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH */
27+
/* Size is defined in json with "mbed_rom_size" */
28+
#define MBED_APP_SIZE MBED_ROM_SIZE
2729
#endif
2830

2931
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
@@ -35,10 +37,12 @@
3537
/* Round up VECTORS_SIZE to 8 bytes */
3638
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
3739

40+
/* RAM_SIZE = 12KB SRAM (0x3000) + Shared mem (part of SRAM2) */
3841
MEMORY
39-
{
40-
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
41-
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
42+
{
43+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
44+
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = 0x3000 - VECTORS_SIZE
45+
RAM2 (rw) : ORIGIN = 0x20030000, LENGTH = 10K
4246
}
4347

4448
/* Linker script to place sections and symbol values. Should be used together
@@ -191,6 +195,19 @@ SECTIONS
191195
*(.stack*)
192196
} > RAM
193197

198+
.ble_stby_mem (NOLOAD) :
199+
{
200+
*(MAPPING_TABLE);
201+
*(MB_MEM1);
202+
} >RAM2
203+
204+
.ble_shared_no_ret (NOLOAD) :
205+
{
206+
_sMB_MEM2 = . ;
207+
*(MB_MEM2);
208+
_eMB_MEM2 = . ;
209+
} >RAM2
210+
194211
/* Set stack top to end of RAM, and stack limit move down by
195212
* size of stack_dummy section */
196213
__StackTop = ORIGIN(RAM) + LENGTH(RAM);

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