Skip to content

Commit a3197f3

Browse files
ccli8adbridge
authored andcommitted
Fix redundant SPI clock generation
Fix SPI clocks are generated redundantly at the end of transfer. This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/ SPI - async mode.
1 parent 7f29545 commit a3197f3

File tree

2 files changed

+7
-10
lines changed

2 files changed

+7
-10
lines changed

targets/TARGET_NUVOTON/TARGET_M251/objects.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ struct spi_s {
8686
int dma_chn_id_tx;
8787
int dma_chn_id_rx;
8888
uint32_t event;
89-
uint32_t hdlr_async;
89+
uint32_t txrx_rmn; // Track tx/rx frames remaining in interrupt way
9090
};
9191

9292
struct i2c_s {

targets/TARGET_NUVOTON/TARGET_M251/spi_api.c

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -367,6 +367,9 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
367367

368368
SPI_ENABLE_SYNC(spi_base);
369369

370+
// Initialize total SPI transfer frames
371+
obj->spi.txrx_rmn = NU_MAX(tx_length, rx_length);
372+
370373
if (obj->spi.dma_usage == DMA_USAGE_NEVER) {
371374
// Interrupt way
372375
spi_master_write_asynch(obj, spi_fifo_depth(obj) / 2);
@@ -637,16 +640,12 @@ static uint32_t spi_event_check(spi_t *obj)
637640
static uint32_t spi_master_write_asynch(spi_t *obj, uint32_t tx_limit)
638641
{
639642
uint32_t n_words = 0;
640-
uint32_t tx_rmn = obj->tx_buff.length - obj->tx_buff.pos;
641-
uint32_t rx_rmn = obj->rx_buff.length - obj->rx_buff.pos;
642-
uint32_t max_tx = NU_MAX(tx_rmn, rx_rmn);
643-
max_tx = NU_MIN(max_tx, tx_limit);
644643
uint8_t data_width = spi_get_data_width(obj);
645644
uint8_t bytes_per_word = (data_width + 7) / 8;
646645
uint8_t *tx = (uint8_t *)(obj->tx_buff.buffer) + bytes_per_word * obj->tx_buff.pos;
647646
SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
648647

649-
while ((n_words < max_tx) && spi_writeable(obj)) {
648+
while (obj->spi.txrx_rmn && spi_writeable(obj)) {
650649
if (spi_is_tx_complete(obj)) {
651650
// Transmit dummy as transmit buffer is empty
652651
SPI_WRITE_TX(spi_base, 0);
@@ -669,6 +668,7 @@ static uint32_t spi_master_write_asynch(spi_t *obj, uint32_t tx_limit)
669668
obj->tx_buff.pos ++;
670669
}
671670
n_words ++;
671+
obj->spi.txrx_rmn --;
672672
}
673673

674674
//Return the number of words that have been sent
@@ -689,15 +689,12 @@ static uint32_t spi_master_write_asynch(spi_t *obj, uint32_t tx_limit)
689689
static uint32_t spi_master_read_asynch(spi_t *obj)
690690
{
691691
uint32_t n_words = 0;
692-
uint32_t tx_rmn = obj->tx_buff.length - obj->tx_buff.pos;
693-
uint32_t rx_rmn = obj->rx_buff.length - obj->rx_buff.pos;
694-
uint32_t max_rx = NU_MAX(tx_rmn, rx_rmn);
695692
uint8_t data_width = spi_get_data_width(obj);
696693
uint8_t bytes_per_word = (data_width + 7) / 8;
697694
uint8_t *rx = (uint8_t *)(obj->rx_buff.buffer) + bytes_per_word * obj->rx_buff.pos;
698695
SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
699696

700-
while ((n_words < max_rx) && spi_readable(obj)) {
697+
while (spi_readable(obj)) {
701698
if (spi_is_rx_complete(obj)) {
702699
// Disregard as receive buffer is full
703700
SPI_READ_RX(spi_base);

0 commit comments

Comments
 (0)