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MAX32670 apply mbed required changes on peripheral drivers
Signed-off-by: Sadik.Ozer <[email protected]>
1 parent 195873f commit a50a444

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45 files changed

+204
-241
lines changed

‎targets/TARGET_Maxim/TARGET_MAX32670/CMakeLists.txt

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@@ -84,7 +84,6 @@ target_sources(mbed-max32670
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${MXM_SOURCE_DIR}/FLC/flc_common.c
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${MXM_SOURCE_DIR}/FLC/flc_me15.c
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${MXM_SOURCE_DIR}/FLC/flc_reva.c
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${MXM_SOURCE_DIR}/FLC/flc_revb.c
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${MXM_SOURCE_DIR}/GPIO/gpio_common.c
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${MXM_SOURCE_DIR}/GPIO/gpio_me15.c

‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/aes_key_regs.h

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@@ -69,9 +69,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */

‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/aes_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */

‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/aeskeys_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */

‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/crc_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */

‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/dma_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */
@@ -99,7 +96,7 @@ typedef struct {
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typedef struct {
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__IO uint32_t inten; /**< <tt>\b 0x000:</tt> DMA INTEN Register */
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__I uint32_t intfl; /**< <tt>\b 0x004:</tt> DMA INTFL Register */
102-
__R uint32_t rsv_0x8_0xff[62];
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__I uint32_t rsv_0x8_0xff[62];
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__IO mxc_dma_ch_regs_t ch[8]; /**< <tt>\b 0x100:</tt> DMA CH Register */
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} mxc_dma_regs_t;
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‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/ecc_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */
@@ -86,7 +83,7 @@ extern "C" {
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* Structure type to access the ECC Registers.
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*/
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typedef struct {
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__R uint32_t rsv_0x0_0x7[2];
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__I uint32_t rsv_0x0_0x7[2];
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__IO uint32_t en; /**< <tt>\b 0x08:</tt> ECC EN Register */
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} mxc_ecc_regs_t;
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‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/fcr_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */

‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/flc_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */
@@ -89,19 +86,19 @@ typedef struct {
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__IO uint32_t addr; /**< <tt>\b 0x00:</tt> FLC ADDR Register */
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__IO uint32_t clkdiv; /**< <tt>\b 0x04:</tt> FLC CLKDIV Register */
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__IO uint32_t ctrl; /**< <tt>\b 0x08:</tt> FLC CTRL Register */
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__R uint32_t rsv_0xc_0x23[6];
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__I uint32_t rsv_0xc_0x23[6];
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__IO uint32_t intr; /**< <tt>\b 0x024:</tt> FLC INTR Register */
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__IO uint32_t eccdata; /**< <tt>\b 0x028:</tt> FLC ECCDATA Register */
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__R uint32_t rsv_0x2c;
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__I uint32_t rsv_0x2c;
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__IO uint32_t data[4]; /**< <tt>\b 0x30:</tt> FLC DATA Register */
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__O uint32_t actrl; /**< <tt>\b 0x40:</tt> FLC ACTRL Register */
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__R uint32_t rsv_0x44_0x7f[15];
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__I uint32_t rsv_0x44_0x7f[15];
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__IO uint32_t welr0; /**< <tt>\b 0x80:</tt> FLC WELR0 Register */
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__R uint32_t rsv_0x84;
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__I uint32_t rsv_0x84;
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__IO uint32_t welr1; /**< <tt>\b 0x88:</tt> FLC WELR1 Register */
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__R uint32_t rsv_0x8c;
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__I uint32_t rsv_0x8c;
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__IO uint32_t rlr0; /**< <tt>\b 0x90:</tt> FLC RLR0 Register */
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__R uint32_t rsv_0x94;
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__I uint32_t rsv_0x94;
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__IO uint32_t rlr1; /**< <tt>\b 0x98:</tt> FLC RLR1 Register */
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} mxc_flc_regs_t;
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‎targets/TARGET_Maxim/TARGET_MAX32670/Libraries/CMSIS/Device/Maxim/MAX32670/Include/gcr_regs.h

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@@ -67,9 +67,6 @@ extern "C" {
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/// @endcond
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/* **** Definitions **** */
@@ -90,20 +87,20 @@ typedef struct {
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__IO uint32_t rst0; /**< <tt>\b 0x04:</tt> GCR RST0 Register */
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__IO uint32_t clkctrl; /**< <tt>\b 0x08:</tt> GCR CLKCTRL Register */
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__IO uint32_t pm; /**< <tt>\b 0x0C:</tt> GCR PM Register */
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__R uint32_t rsv_0x10_0x17[2];
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__I uint32_t rsv_0x10_0x17[2];
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__IO uint32_t pclkdiv; /**< <tt>\b 0x18:</tt> GCR PCLKDIV Register */
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__R uint32_t rsv_0x1c_0x23[2];
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__I uint32_t rsv_0x1c_0x23[2];
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__IO uint32_t pclkdis0; /**< <tt>\b 0x24:</tt> GCR PCLKDIS0 Register */
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__IO uint32_t memctrl; /**< <tt>\b 0x28:</tt> GCR MEMCTRL Register */
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__IO uint32_t memz; /**< <tt>\b 0x2C:</tt> GCR MEMZ Register */
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__R uint32_t rsv_0x30_0x3f[4];
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__I uint32_t rsv_0x30_0x3f[4];
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__IO uint32_t sysst; /**< <tt>\b 0x40:</tt> GCR SYSST Register */
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__IO uint32_t rst1; /**< <tt>\b 0x44:</tt> GCR RST1 Register */
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__IO uint32_t pclkdis1; /**< <tt>\b 0x48:</tt> GCR PCLKDIS1 Register */
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__IO uint32_t eventen; /**< <tt>\b 0x4C:</tt> GCR EVENTEN Register */
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__I uint32_t revision; /**< <tt>\b 0x50:</tt> GCR REVISION Register */
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__IO uint32_t sysie; /**< <tt>\b 0x54:</tt> GCR SYSIE Register */
106-
__R uint32_t rsv_0x58_0x63[3];
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__I uint32_t rsv_0x58_0x63[3];
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__IO uint32_t eccerr; /**< <tt>\b 0x64:</tt> GCR ECCERR Register */
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__IO uint32_t eccced; /**< <tt>\b 0x68:</tt> GCR ECCCED Register */
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__IO uint32_t eccie; /**< <tt>\b 0x6C:</tt> GCR ECCIE Register */

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