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/*
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- * Hardware aes implementation for STM32F4 STM32F7 and STM32L4 families
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+ * Hardware AES implementation for STM32L4 family
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*******************************************************************************
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* Copyright (c) 2017, STMicroelectronics
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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- #include <string.h>
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+ #if (TARGET_STM32L4 )
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+
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#include "mbedtls/aes.h"
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#if defined(MBEDTLS_AES_ALT )
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+ #include <string.h>
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+
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#include "mbedtls/platform.h"
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- //the following defines are provided to maintain compatibility between STM32 families
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- #define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
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- #define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
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- #define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
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- #define CRYP AES
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static int aes_set_key (mbedtls_aes_context * ctx , const unsigned char * key , unsigned int keybits )
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{
@@ -48,15 +46,15 @@ static int aes_set_key(mbedtls_aes_context *ctx, const unsigned char *key, unsig
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}
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ctx -> hcryp_aes .Init .DataType = CRYP_DATATYPE_8B ;
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- ctx -> hcryp_aes .Instance = CRYP ;
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+ ctx -> hcryp_aes .Instance = AES ;
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/* Deinitializes the CRYP peripheral */
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if (HAL_CRYP_DeInit (& ctx -> hcryp_aes ) == HAL_ERROR ) {
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return (HAL_ERROR );
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}
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/* Enable CRYP clock */
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- __HAL_RCC_CRYP_CLK_ENABLE ();
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+ __HAL_RCC_AES_CLK_ENABLE ();
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ctx -> hcryp_aes .Init .pKey = ctx -> aes_key ;
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ctx -> hcryp_aes .Init .KeyWriteFlag = CRYP_KEY_WRITE_ENABLE ;
@@ -97,10 +95,10 @@ void mbedtls_aes_free(mbedtls_aes_context *ctx)
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}
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#endif /* DUAL_CORE */
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/* Force the CRYP Periheral Clock Reset */
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- __HAL_RCC_CRYP_FORCE_RESET ();
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+ __HAL_RCC_AES_FORCE_RESET ();
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/* Release the CRYP Periheral Clock Reset */
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- __HAL_RCC_CRYP_RELEASE_RESET ();
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+ __HAL_RCC_AES_RELEASE_RESET ();
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#if defined(DUAL_CORE )
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LL_HSEM_ReleaseLock (HSEM , CFG_HW_RCC_SEMID , HSEM_CR_COREID_CURRENT );
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#endif /* DUAL_CORE */
@@ -388,3 +386,4 @@ void mbedtls_aes_decrypt(mbedtls_aes_context *ctx,
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}
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#endif /* MBEDTLS_DEPRECATED_REMOVED */
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#endif /*MBEDTLS_AES_ALT*/
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+ #endif /* TARGET_STM32L4 */
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