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STM32F0: ST CUBE drivers update V1.11.1 => V1.11.2
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targets/TARGET_STM/README.md

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@@ -61,7 +61,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
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| STM32 Serie | Cube version | Github source |
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|-------------|--------------|---------------------------------------------------|
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| F0 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF0 |
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| F0 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF0 |
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| F1 | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeF1 |
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| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
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| F3 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF3 |

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/CMSIS/stm32f030xc.h

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@@ -3131,8 +3131,8 @@ typedef struct
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#define RCC_CFGR_PPRE_DIV16_Msk (0x7UL << RCC_CFGR_PPRE_DIV16_Pos) /*!< 0x00000700 */
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#define RCC_CFGR_PPRE_DIV16 RCC_CFGR_PPRE_DIV16_Msk /*!< HCLK divided by 16 */
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#define RCC_CFGR_PLLSRC_Pos (15U)
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#define RCC_CFGR_PLLSRC_Msk (0x3UL << RCC_CFGR_PLLSRC_Pos) /*!< 0x00018000 */
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#define RCC_CFGR_PLLSRC_Pos (16U)
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#define RCC_CFGR_PLLSRC_Msk (0x1UL << RCC_CFGR_PLLSRC_Pos) /*!< 0x00010000 */
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#define RCC_CFGR_PLLSRC RCC_CFGR_PLLSRC_Msk /*!< PLL entry clock source */
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#define RCC_CFGR_PLLSRC_HSI_DIV2 (0x00000000U) /*!< HSI clock divided by 2 selected as PLL entry clock source */
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#define RCC_CFGR_PLLSRC_HSI_PREDIV (0x00008000U) /*!< HSI/PREDIV clock selected as PLL entry clock source */

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/CMSIS/stm32f0xx.h

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@@ -53,8 +53,14 @@
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#define STM32F0
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#endif /* STM32F0 */
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/* Uncomment the line below according to the target STM32 device used in your
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application
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/** Uncomment the line below according to the target STM32 device used in your application.
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* stm32f0xxxx.h file contains:
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* - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
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* - IRQ channel definition
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* - Peripheral memory mapping and physical registers address definition
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* - Peripheral pointer declaration and driver header file inclusion
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* - Product miscellaneous configuration: assert macros…
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* Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-family’s superset.
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*/
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#if !defined (STM32F030x6) && !defined (STM32F030x8) && \
@@ -68,7 +74,7 @@
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/* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
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/* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */
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/* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
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/* #define STM32F048x6 */ /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes) */
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/* #define STM32F048xx */ /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes) */
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/* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
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/* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */
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/* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
@@ -80,7 +86,11 @@
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/* #define STM32F091xC */ /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes) */
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/* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */
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#endif
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/* Legacy aliases */
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#if defined (STM32F048x6)
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#define STM32F048xx
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#endif /* STM32F048x6 */
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
@@ -94,11 +104,11 @@
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number V2.3.4
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* @brief CMSIS Device version number V2.3.5
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*/
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#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
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#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
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#define __STM32F0_DEVICE_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
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#define __STM32F0_DEVICE_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */
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#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
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|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\

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