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jeromecoutantadbridge
jeromecoutant
authored and
adbridge
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TARGET_STM32F2 astyle
1 parent 56975a5 commit b3292e2

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8 files changed

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-147
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8 files changed

+150
-147
lines changed

‎targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PinNames.h

Lines changed: 47 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -47,27 +47,27 @@ typedef enum {
4747

4848
typedef enum {
4949
PA_0 = 0x00,
50-
PA_0_ALT0 = 0x00|ALT0,
51-
PA_0_ALT1 = 0x00|ALT1,
50+
PA_0_ALT0 = 0x00 | ALT0,
51+
PA_0_ALT1 = 0x00 | ALT1,
5252
PA_1 = 0x01,
53-
PA_1_ALT0 = PA_1|ALT0,
54-
PA_1_ALT1 = PA_1|ALT1,
53+
PA_1_ALT0 = PA_1 | ALT0,
54+
PA_1_ALT1 = PA_1 | ALT1,
5555
PA_2 = 0x02,
56-
PA_2_ALT0 = PA_2|ALT0,
57-
PA_2_ALT1 = PA_2|ALT1,
56+
PA_2_ALT0 = PA_2 | ALT0,
57+
PA_2_ALT1 = PA_2 | ALT1,
5858
PA_3 = 0x03,
59-
PA_3_ALT0 = 0x03|ALT0,
60-
PA_3_ALT1 = 0x03|ALT1,
59+
PA_3_ALT0 = 0x03 | ALT0,
60+
PA_3_ALT1 = 0x03 | ALT1,
6161
PA_4 = 0x04,
62-
PA_4_ALT0 = 0x04|ALT0,
62+
PA_4_ALT0 = 0x04 | ALT0,
6363
PA_5 = 0x05,
64-
PA_5_ALT0 = 0x05|ALT0,
64+
PA_5_ALT0 = 0x05 | ALT0,
6565
PA_6 = 0x06,
66-
PA_6_ALT0 = 0x06|ALT0,
66+
PA_6_ALT0 = 0x06 | ALT0,
6767
PA_7 = 0x07,
68-
PA_7_ALT0 = 0x07|ALT0,
69-
PA_7_ALT1 = 0x07|ALT1,
70-
PA_7_ALT2 = 0x07|ALT2,
68+
PA_7_ALT0 = 0x07 | ALT0,
69+
PA_7_ALT1 = 0x07 | ALT1,
70+
PA_7_ALT2 = 0x07 | ALT2,
7171
PA_8 = 0x08,
7272
PA_9 = 0x09,
7373
PA_10 = 0x0A,
@@ -76,63 +76,63 @@ typedef enum {
7676
PA_13 = 0x0D,
7777
PA_14 = 0x0E,
7878
PA_15 = 0x0F,
79-
PA_15_ALT0 = 0x0F|ALT0,
79+
PA_15_ALT0 = 0x0F | ALT0,
8080

8181
PB_0 = 0x10,
82-
PB_0_ALT0 = 0x10|ALT0,
83-
PB_0_ALT1 = 0x10|ALT1,
84-
PB_0_ALT2 = 0x10|ALT2,
82+
PB_0_ALT0 = 0x10 | ALT0,
83+
PB_0_ALT1 = 0x10 | ALT1,
84+
PB_0_ALT2 = 0x10 | ALT2,
8585
PB_1 = 0x11,
86-
PB_1_ALT0 = 0x11|ALT0,
87-
PB_1_ALT1 = 0x11|ALT1,
86+
PB_1_ALT0 = 0x11 | ALT0,
87+
PB_1_ALT1 = 0x11 | ALT1,
8888
PB_2 = 0x12,
8989
PB_3 = 0x13,
90-
PB_3_ALT0 = 0x13|ALT0,
90+
PB_3_ALT0 = 0x13 | ALT0,
9191
PB_4 = 0x14,
92-
PB_4_ALT0 = 0x14|ALT0,
92+
PB_4_ALT0 = 0x14 | ALT0,
9393
PB_5 = 0x15,
94-
PB_5_ALT0 = 0x15|ALT0,
94+
PB_5_ALT0 = 0x15 | ALT0,
9595
PB_6 = 0x16,
9696
PB_7 = 0x17,
9797
PB_8 = 0x18,
98-
PB_8_ALT0 = 0x18|ALT0,
98+
PB_8_ALT0 = 0x18 | ALT0,
9999
PB_9 = 0x19,
100-
PB_9_ALT0 = 0x19|ALT0,
100+
PB_9_ALT0 = 0x19 | ALT0,
101101
PB_10 = 0x1A,
102102
PB_11 = 0x1B,
103103
PB_12 = 0x1C,
104104
PB_13 = 0x1D,
105105
PB_14 = 0x1E,
106-
PB_14_ALT0 = PB_14|ALT0,
107-
PB_14_ALT1 = PB_14|ALT1,
106+
PB_14_ALT0 = PB_14 | ALT0,
107+
PB_14_ALT1 = PB_14 | ALT1,
108108
PB_15 = 0x1F,
109-
PB_15_ALT0 = 0x1F|ALT0,
110-
PB_15_ALT1 = 0x1F|ALT1,
109+
PB_15_ALT0 = 0x1F | ALT0,
110+
PB_15_ALT1 = 0x1F | ALT1,
111111

112112
PC_0 = 0x20,
113-
PC_0_ALT0 = 0x20|ALT0,
114-
PC_0_ALT1 = 0x20|ALT1,
113+
PC_0_ALT0 = 0x20 | ALT0,
114+
PC_0_ALT1 = 0x20 | ALT1,
115115
PC_1 = 0x21,
116-
PC_1_ALT0 = PC_1|ALT0,
117-
PC_1_ALT1 = PC_1|ALT1,
116+
PC_1_ALT0 = PC_1 | ALT0,
117+
PC_1_ALT1 = PC_1 | ALT1,
118118
PC_2 = 0x22,
119-
PC_2_ALT0 = 0x22|ALT0,
120-
PC_2_ALT1 = 0x22|ALT1,
119+
PC_2_ALT0 = 0x22 | ALT0,
120+
PC_2_ALT1 = 0x22 | ALT1,
121121
PC_3 = 0x23,
122-
PC_3_ALT0 = 0x23|ALT0,
123-
PC_3_ALT1 = 0x23|ALT1,
122+
PC_3_ALT0 = 0x23 | ALT0,
123+
PC_3_ALT1 = 0x23 | ALT1,
124124
PC_4 = 0x24,
125-
PC_4_ALT0 = PC_4|ALT0,
125+
PC_4_ALT0 = PC_4 | ALT0,
126126
PC_5 = 0x25,
127-
PC_5_ALT0 = PC_5|ALT0,
127+
PC_5_ALT0 = PC_5 | ALT0,
128128
PC_6 = 0x26,
129-
PC_6_ALT0 = 0x26|ALT0,
129+
PC_6_ALT0 = 0x26 | ALT0,
130130
PC_7 = 0x27,
131-
PC_7_ALT0 = 0x27|ALT0,
131+
PC_7_ALT0 = 0x27 | ALT0,
132132
PC_8 = 0x28,
133-
PC_8_ALT0 = 0x28|ALT0,
133+
PC_8_ALT0 = 0x28 | ALT0,
134134
PC_9 = 0x29,
135-
PC_9_ALT0 = 0x29|ALT0,
135+
PC_9_ALT0 = 0x29 | ALT0,
136136
PC_10 = 0x2A,
137137
PC_11 = 0x2B,
138138
PC_12 = 0x2C,
@@ -272,7 +272,7 @@ typedef enum {
272272
SPI_CS = D10,
273273
PWM_OUT = D9,
274274

275-
/**** USB pins ****/
275+
/**** USB pins ****/
276276
USB_OTG_FS_DM = PA_11,
277277
USB_OTG_FS_DP = PA_12,
278278
USB_OTG_FS_ID = PA_10,
@@ -296,7 +296,7 @@ typedef enum {
296296
USB_OTG_HS_ULPI_STP = PC_0,
297297
USB_OTG_HS_VBUS = PB_13,
298298

299-
/**** ETHERNET pins ****/
299+
/**** ETHERNET pins ****/
300300
ETH_COL = PA_3,
301301
ETH_CRS = PA_0,
302302
ETH_CRS_DV = PA_7,
@@ -323,13 +323,13 @@ typedef enum {
323323
ETH_TX_EN = PB_11,
324324
ETH_TX_EN_ALT0 = PG_11,
325325

326-
/**** OSCILLATOR pins ****/
326+
/**** OSCILLATOR pins ****/
327327
RCC_OSC32_IN = PC_14,
328328
RCC_OSC32_OUT = PC_15,
329329
RCC_OSC_IN = PH_0,
330330
RCC_OSC_OUT = PH_1,
331331

332-
/**** DEBUG pins ****/
332+
/**** DEBUG pins ****/
333333
SYS_JTCK_SWCLK = PA_14,
334334
SYS_JTDI = PA_15,
335335
SYS_JTDO_SWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32F2/analogout_device.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ void analogout_init(dac_t *obj, PinName pin)
7474
obj->handle.Instance = (DAC_TypeDef *)(obj->dac);
7575
obj->handle.State = HAL_DAC_STATE_RESET;
7676

77-
if (HAL_DAC_Init(&obj->handle) != HAL_OK ) {
77+
if (HAL_DAC_Init(&obj->handle) != HAL_OK) {
7878
error("HAL_DAC_Init failed");
7979
}
8080

‎targets/TARGET_STM/TARGET_STM32F2/flash_api.c

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
* limitations under the License.
1515
*/
1616

17-
#if DEVICE_FLASH
17+
#if DEVICE_FLASH
1818

1919
#include "flash_api.h"
2020
#include "flash_data.h"
@@ -99,10 +99,10 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
9999
return -1;
100100
}
101101

102-
/* Note: If an erase operation in Flash memory also concerns data in the data or instruction cache,
103-
you have to make sure that these data are rewritten before they are accessed during code
104-
execution. If this cannot be done safely, it is recommended to flush the caches by setting the
105-
DCRST and ICRST bits in the FLASH_CR register. */
102+
/* Note: If an erase operation in Flash memory also concerns data in the data or instruction cache,
103+
you have to make sure that these data are rewritten before they are accessed during code
104+
execution. If this cannot be done safely, it is recommended to flush the caches by setting the
105+
DCRST and ICRST bits in the FLASH_CR register. */
106106
__HAL_FLASH_DATA_CACHE_DISABLE();
107107
__HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
108108

@@ -171,13 +171,13 @@ static uint32_t GetSector(uint32_t address)
171171
}
172172
#endif
173173
if (address < ADDR_FLASH_SECTOR_4) { // 16k sectorsize
174-
sector += tmp >>14;
174+
sector += tmp >> 14;
175175
}
176176
#if defined(ADDR_FLASH_SECTOR_5)
177177
else if (address < ADDR_FLASH_SECTOR_5) { //64k sector size
178178
sector += FLASH_SECTOR_4;
179179
} else {
180-
sector += 4 + (tmp >>17);
180+
sector += 4 + (tmp >> 17);
181181
}
182182
#else
183183
// In case ADDR_FLASH_SECTOR_5 is not defined, sector 4 is the last one.
@@ -197,16 +197,16 @@ static uint32_t GetSectorSize(uint32_t Sector)
197197
{
198198
uint32_t sectorsize = 0x00;
199199
#if defined(FLASH_SECTOR_16)
200-
if((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) ||\
201-
(Sector == FLASH_SECTOR_3) || (Sector == FLASH_SECTOR_12) || (Sector == FLASH_SECTOR_13) ||\
202-
(Sector == FLASH_SECTOR_14) || (Sector == FLASH_SECTOR_15)) {
203-
sectorsize = 16 * 1024;
204-
} else if((Sector == FLASH_SECTOR_4) || (Sector == FLASH_SECTOR_16)) {
200+
if ((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) || \
201+
(Sector == FLASH_SECTOR_3) || (Sector == FLASH_SECTOR_12) || (Sector == FLASH_SECTOR_13) || \
202+
(Sector == FLASH_SECTOR_14) || (Sector == FLASH_SECTOR_15)) {
203+
sectorsize = 16 * 1024;
204+
} else if ((Sector == FLASH_SECTOR_4) || (Sector == FLASH_SECTOR_16)) {
205205
#else
206-
if((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) ||\
207-
(Sector == FLASH_SECTOR_3)) {
208-
sectorsize = 16 * 1024;
209-
} else if(Sector == FLASH_SECTOR_4) {
206+
if ((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) || \
207+
(Sector == FLASH_SECTOR_3)) {
208+
sectorsize = 16 * 1024;
209+
} else if (Sector == FLASH_SECTOR_4) {
210210
#endif
211211
sectorsize = 64 * 1024;
212212
} else {

‎targets/TARGET_STM/TARGET_STM32F2/gpio_irq_device.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -39,27 +39,27 @@ extern "C" {
3939
// until then let's define locally the required functions
4040
__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
4141
{
42-
SET_BIT(EXTI->RTSR, ExtiLine);
42+
SET_BIT(EXTI->RTSR, ExtiLine);
4343
}
4444
__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
4545
{
46-
CLEAR_BIT(EXTI->RTSR, ExtiLine);
46+
CLEAR_BIT(EXTI->RTSR, ExtiLine);
4747
}
4848
__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
4949
{
50-
SET_BIT(EXTI->FTSR, ExtiLine);
50+
SET_BIT(EXTI->FTSR, ExtiLine);
5151
}
5252
__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
5353
{
54-
CLEAR_BIT(EXTI->FTSR, ExtiLine);
54+
CLEAR_BIT(EXTI->FTSR, ExtiLine);
5555
}
5656
__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
5757
{
58-
SET_BIT(EXTI->IMR, ExtiLine);
58+
SET_BIT(EXTI->IMR, ExtiLine);
5959
}
6060
__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
6161
{
62-
CLEAR_BIT(EXTI->IMR, ExtiLine);
62+
CLEAR_BIT(EXTI->IMR, ExtiLine);
6363
}
6464
// Above lines shall be later defined in LL
6565

‎targets/TARGET_STM/TARGET_STM32F2/pin_device.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -71,35 +71,35 @@
7171

7272
__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
7373
{
74-
MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
75-
(Alternate << (POSITION_VAL(Pin) * 4U)));
74+
MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
75+
(Alternate << (POSITION_VAL(Pin) * 4U)));
7676
}
7777

7878
__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
7979
{
80-
MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
81-
(Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
80+
MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
81+
(Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
8282
}
8383
__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
8484
{
85-
MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
85+
MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
8686
}
8787
__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
8888
{
89-
return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
89+
return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODER0)) / (Pin * Pin));
9090
}
9191
__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
9292
{
93-
MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
93+
MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
9494
}
9595
__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
9696
{
97-
MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
97+
MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
9898
}
9999
__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
100100
{
101-
MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
102-
(Speed << (POSITION_VAL(Pin) * 2U)));
101+
MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
102+
(Speed << (POSITION_VAL(Pin) * 2U)));
103103
}
104104
// Above lines shall be defined in LL when available
105105

@@ -126,14 +126,15 @@ static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint3
126126
}
127127
}
128128

129-
static inline void stm_pin_SetAFPin( GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
129+
static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
130130
{
131131
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
132132

133-
if (STM_PIN(pin) > 7)
133+
if (STM_PIN(pin) > 7) {
134134
LL_GPIO_SetAFPin_8_15(gpio, ll_pin, afnum);
135-
else
135+
} else {
136136
LL_GPIO_SetAFPin_0_7(gpio, ll_pin, afnum);
137+
}
137138
}
138139

139140
#endif

‎targets/TARGET_STM/TARGET_STM32F2/pwmout_device.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,7 @@
3333

3434
#ifdef DEVICE_PWMOUT
3535

36-
const pwm_apb_map_t pwm_apb_map_table[] =
37-
{
36+
const pwm_apb_map_t pwm_apb_map_table[] = {
3837
#if defined(TIM2_BASE)
3938
{PWM_2, PWMOUT_ON_APB1},
4039
#endif

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