@@ -4014,34 +4014,37 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
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}
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else if ((tmp == 2U ) || (tmp == 3U ))
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{
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- if (hi2c -> XferOptions != I2C_NEXT_FRAME )
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- {
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+ // MBED patch if(hi2c->XferOptions != I2C_NEXT_FRAME)
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+ // MBED patch {
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/* Disable Acknowledge */
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hi2c -> Instance -> CR1 &= ~I2C_CR1_ACK ;
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/* Enable Pos */
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hi2c -> Instance -> CR1 |= I2C_CR1_POS ;
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- }
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- else
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- {
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- /* Enable Acknowledge */
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- hi2c -> Instance -> CR1 |= I2C_CR1_ACK ;
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- }
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+ // MBED patch }
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+ // MBED patch else
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+ // MBED patch {
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+ // MBED patch /* Enable Acknowledge */
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+ // MBED patch hi2c->Instance->CR1 |= I2C_CR1_ACK;
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+ // MBED patch }
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/* Disable BUF interrupt */
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__HAL_I2C_DISABLE_IT (hi2c , I2C_IT_BUF );
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}
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else
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{
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- if (hi2c -> XferOptions != I2C_NEXT_FRAME )
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- {
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+ // MBED patch if(hi2c->XferOptions != I2C_NEXT_FRAME)
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+ // MBED patch {
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/* Disable Acknowledge */
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hi2c -> Instance -> CR1 &= ~I2C_CR1_ACK ;
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- }
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- else
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+ // MBED patch }
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+ // MBED patch else
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+ if (hi2c -> XferOptions == I2C_NEXT_FRAME ) // MBED patch
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{
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- /* Enable Acknowledge */
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- hi2c -> Instance -> CR1 |= I2C_CR1_ACK ;
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+ // MBED patch /* Enable Acknowledge */
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+ // MBED patch hi2c->Instance->CR1 |= I2C_CR1_ACK;
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+ /* Enable Pos */
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+ hi2c -> Instance -> CR1 |= I2C_CR1_POS ;
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}
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/* Disable EVT, BUF and ERR interrupt */
@@ -4097,24 +4100,27 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
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/* Prepare next transfer or stop current transfer */
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if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME ) && (CurrentXferOptions != I2C_LAST_FRAME ) && (CurrentXferOptions != I2C_NO_OPTION_FRAME ))
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{
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- if (CurrentXferOptions != I2C_NEXT_FRAME )
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- {
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+ // MBED patch if(CurrentXferOptions != I2C_NEXT_FRAME)
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+ // MBED patch {
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/* Disable Acknowledge */
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hi2c -> Instance -> CR1 &= ~I2C_CR1_ACK ;
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- }
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- else
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+ // MBED patch }
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+ // MBED patch else
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+ if ((CurrentXferOptions == I2C_NEXT_FRAME ) || (CurrentXferOptions == I2C_FIRST_FRAME )) // MBED patch
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{
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- /* Enable Acknowledge */
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- hi2c -> Instance -> CR1 |= I2C_CR1_ACK ;
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+ // MBED patch /* Enable Acknowledge */
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+ // MBED patch hi2c->Instance->CR1 |= I2C_CR1_ACK;
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+ /* Generate ReStart */ // MBED patch
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+ hi2c -> Instance -> CR1 |= I2C_CR1_START ; // MBED patch
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}
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/* Disable EVT and ERR interrupt */
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- __HAL_I2C_DISABLE_IT (hi2c , I2C_IT_EVT | I2C_IT_ERR );
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+ // MBED patch __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
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}
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else
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{
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/* Disable EVT and ERR interrupt */
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- __HAL_I2C_DISABLE_IT (hi2c , I2C_IT_EVT | I2C_IT_ERR );
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+ // MBED patch __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
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/* Generate Stop */
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hi2c -> Instance -> CR1 |= I2C_CR1_STOP ;
@@ -4128,6 +4134,9 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
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(* hi2c -> pBuffPtr ++ ) = hi2c -> Instance -> DR ;
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hi2c -> XferCount -- ;
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+ /* Disable EVT and ERR interrupt */ // MBED patch
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+ __HAL_I2C_DISABLE_IT (hi2c , I2C_IT_EVT | I2C_IT_ERR ); // MBED patch
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+
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hi2c -> State = HAL_I2C_STATE_READY ;
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hi2c -> PreviousState = I2C_STATE_NONE ;
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