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Merge pull request #15120 from jeromecoutant/PR_H735
STM32: enable STM32H735xG STM32H7B3xIQ for custom boards
2 parents 7f2b6d0 + 317079b commit b57fe3f

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‎targets/TARGET_STM/TARGET_STM32H7/CMakeLists.txt

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add_subdirectory(TARGET_STM32H723xG EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H725xE EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H735xG EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H743xI EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H745xI EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H747xI EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H750xB EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H7A3xIQ EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_STM32H7B3xIQ EXCLUDE_FROM_ALL)
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add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
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add_library(mbed-stm32h7 INTERFACE)

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/CMakeLists.txt

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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
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set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h735xx.S)
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set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h735xg.ld)
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elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
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set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h735xx.S)
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set(LINKER_FILE TOOLCHAIN_ARM/stm32h735xg.sct)
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endif()
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add_library(mbed-stm32h735xg INTERFACE)
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target_include_directories(mbed-stm32h735xg
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INTERFACE
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.
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)
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target_sources(mbed-stm32h735xg
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INTERFACE
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${STARTUP_FILE}
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)
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mbed_set_linker_script(mbed-stm32h735xg ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
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target_link_libraries(mbed-stm32h735xg INTERFACE mbed-stm32h7)

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_ARM/startup_stm32h735xx.S

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‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_ARM/stm32h735xg.sct

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#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m7
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; Scatter-Loading Description File
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;******************************************************************************
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;* @attention
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;*
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;* Copyright (c) 2016-2020 STMicroelectronics.
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;* All rights reserved.
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;*
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;* This software component is licensed by ST under BSD 3-Clause license,
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;* the "License"; You may not use this file except in compliance with the
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;* License. You may obtain a copy of the License at:
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;* opensource.org/licenses/BSD-3-Clause
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;*
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;******************************************************************************
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#include "../cmsis_nvic.h"
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#if !defined(MBED_APP_START)
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#define MBED_APP_START MBED_ROM_START
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
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/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
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#if defined(MBED_BOOT_STACK_SIZE)
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#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
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#else
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#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
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#endif
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#endif
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE {
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ER_IROM1 MBED_APP_START MBED_APP_SIZE {
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
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}
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ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
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}
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}

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_GCC_ARM/startup_stm32h735xx.S

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‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/TOOLCHAIN_GCC_ARM/stm32h735xg.ld

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/* Linker script to configure memory regions. */
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/*
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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#include "../cmsis_nvic.h"
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#if !defined(MBED_APP_START)
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#define MBED_APP_START MBED_ROM_START
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
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/* This value is normally defined by the tools
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to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
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#endif
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
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MEMORY
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{
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FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
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RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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* _estack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.isr_vector))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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_sidata = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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_sdata = .;
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*(vtable)
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*(.data*)
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. = ALIGN(8);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(8);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(8);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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KEEP(*(.jcr*))
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. = ALIGN(8);
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/* All data end */
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__data_end__ = .;
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_edata = .;
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} > RAM
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/* Uninitialized data section
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* This region is not initialized by the C/C++ library and can be used to
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* store state across soft reboots. */
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.uninitialized (NOLOAD):
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{
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. = ALIGN(32);
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__uninitialized_start = .;
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*(.uninitialized)
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KEEP(*(.keep.uninitialized))
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. = ALIGN(32);
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__uninitialized_end = .;
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} > RAM
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.bss :
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{
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. = ALIGN(8);
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__bss_start__ = .;
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_sbss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(8);
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__bss_end__ = .;
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_ebss = .;
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} > RAM
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.heap (COPY):
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{
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__end__ = .;
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PROVIDE(end = .);
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*(.heap*)
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. = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE;
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy (COPY):
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{
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*(.stack*)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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_estack = __StackTop;
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__StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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}

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