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STM32 CAN : remove warning [-Wsign-compare]
Detected with NUCLEO_G474RE build: [Warning] stm32g4xx_hal_fdcan.h@1325,84: comparison is always true due to limited range of data type [-Wtype-limits] [Warning] stm32g4xx_hal_fdcan.h@1331,46: comparison of integer expressions of different signedness: 'int' and 'unsigned int' [-Wsign-compare] [Warning] stm32g4xx_hal_fdcan.h@1331,65: comparison of integer expressions of different signedness: 'int' and 'unsigned int' [-Wsign-compare] [Warning] stm32g4xx_hal_fdcan.h@1325,61: comparison of integer expressions of different signedness: 'int' and 'unsigned int' [-Wsign-compare] [Warning] stm32g4xx_hal_fdcan.h@1325,84: comparison of integer expressions of different signedness: 'int' and 'unsigned int' [-Wsign-compare]
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targets/TARGET_STM/can_api.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -142,16 +142,16 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
142142
// We use PLL1.Q clock right now so get its frequency
143143
PLL1_ClocksTypeDef pll1_clocks;
144144
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
145-
int ntq = pll1_clocks.PLL1_Q_Frequency / hz;
145+
uint32_t ntq = pll1_clocks.PLL1_Q_Frequency / (uint32_t)hz;
146146
#else
147147
#if (defined RCC_PERIPHCLK_FDCAN1)
148-
int ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN1) / hz;
148+
uint32_t ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN1) / (uint32_t)hz;
149149
#else
150-
int ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN) / hz;
150+
uint32_t ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN) / (uint32_t)hz;
151151
#endif
152152
#endif
153153

154-
int nominalPrescaler = 1;
154+
uint32_t nominalPrescaler = 1;
155155
// !When the sample point should be lower than 50%, this must be changed to
156156
// !IS_FDCAN_NOMINAL_TSEG2(ntq/nominalPrescaler), since
157157
// NTSEG2 and SJW max values are lower. For now the sample point is fix @75%
@@ -322,16 +322,16 @@ int can_frequency(can_t *obj, int f)
322322
// STM32H7 doesn't support yet HAL_RCCEx_GetPeriphCLKFreq for FDCAN
323323
PLL1_ClocksTypeDef pll1_clocks;
324324
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
325-
int ntq = pll1_clocks.PLL1_Q_Frequency / f;
325+
uint32_t ntq = pll1_clocks.PLL1_Q_Frequency / (uint32_t)f;
326326
#else
327327
#if (defined RCC_PERIPHCLK_FDCAN1)
328-
int ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN1) / f;
328+
uint32_t ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN1) / (uint32_t)f;
329329
#else
330-
int ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN) / f;
330+
uint32_t ntq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_FDCAN) / (uint32_t)f;
331331
#endif
332332
#endif
333333

334-
int nominalPrescaler = 1;
334+
uint32_t nominalPrescaler = 1;
335335
// !When the sample point should be lower than 50%, this must be changed to
336336
// !IS_FDCAN_DATA_TSEG2(ntq/nominalPrescaler), since
337337
// NTSEG2 and SJW max values are lower. For now the sample point is fix @75%

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