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STM32G0: update from STM32Cube_FW_G0_V1.5.0
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‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/LICENSE.txt

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This software component is provided to you as part of a software package and
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applicable license terms are in the Package_license file. If you received this
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software component outside of a package or without applicable license terms,
4+
the terms of the Apache-2.0 license shall apply.
5+
You may obtain a copy of the Apache-2.0 at:
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https://opensource.org/licenses/Apache-2.0

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g030xx.h

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‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g031xx.h

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‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g041xx.h

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******************************************************************************
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* @attention
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*
17-
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
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*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
2625
*/
27-
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/** @addtogroup CMSIS_Device
2927
* @{
3028
*/
@@ -596,6 +594,7 @@ typedef struct
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#define SRAM_SIZE_MAX (0x00002000UL) /*!< maximum SRAM size (up to 8 KBytes) */
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598596
#define FLASH_SIZE (((*((uint32_t *)FLASHSIZE_BASE)) & (0x007FU)) << 10U)
597+
599598
/*!< Peripheral memory map */
600599
#define APBPERIPH_BASE (PERIPH_BASE)
601600
#define AHBPERIPH_BASE (PERIPH_BASE + 0x00020000UL)
@@ -751,6 +750,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
756+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
757+
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -1870,7 +1878,6 @@ typedef struct
18701878
#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
18711879
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
18721880
#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
1873-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
18741881
#define DMAMUX_CxCR_SOIE_Pos (8U)
18751882
#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
18761883
#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g050xx.h

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******************************************************************************
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* @attention
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*
17-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
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* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
2423
*
2524
******************************************************************************
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*/
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/** @addtogroup CMSIS_Device
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* @{
3028
*/
@@ -681,6 +679,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
685+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
686+
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
685692
* @{
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*/
@@ -1611,7 +1618,6 @@ typedef struct
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#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
16121619
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
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#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
1614-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
16151621
#define DMAMUX_CxCR_SOIE_Pos (8U)
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#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
16171623
#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g051xx.h

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******************************************************************************
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* @attention
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*
17-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
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*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS_Device
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* @{
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*/
@@ -768,6 +766,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -1929,7 +1936,6 @@ typedef struct
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#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
19301937
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
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#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
1932-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
19331939
#define DMAMUX_CxCR_SOIE_Pos (8U)
19341940
#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
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#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g061xx.h

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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
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*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS_Device
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* @{
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*/
@@ -815,6 +813,15 @@ typedef struct
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* @{
816814
*/
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816+
/** @addtogroup Hardware_Constant_Definition
817+
* @{
818+
*/
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#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2165,7 +2172,6 @@ typedef struct
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#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
21662173
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
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#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
2168-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
21692175
#define DMAMUX_CxCR_SOIE_Pos (8U)
21702176
#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
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#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g070xx.h

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******************************************************************************
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* @attention
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*
17-
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.</center></h2>
17+
* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS_Device
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* @{
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*/
@@ -684,6 +682,15 @@ typedef struct
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* @{
685683
*/
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685+
/** @addtogroup Hardware_Constant_Definition
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* @{
687+
*/
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#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
688695
* @{
689696
*/
@@ -1614,7 +1621,6 @@ typedef struct
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#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
16151622
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
16161623
#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
1617-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
16181624
#define DMAMUX_CxCR_SOIE_Pos (8U)
16191625
#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
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#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g071xx.h

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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.</center></h2>
17+
* Copyright (c) 2018-2021 STMicroelectronics.
18+
* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS_Device
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* @{
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*/
@@ -821,6 +819,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
823+
* @{
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*/
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#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
826833
*/
@@ -2119,7 +2126,6 @@ typedef struct
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#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
21202127
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
21212128
#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
2122-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
21232129
#define DMAMUX_CxCR_SOIE_Pos (8U)
21242130
#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
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#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

‎targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/CMSIS/stm32g081xx.h

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@@ -14,17 +14,15 @@
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******************************************************************************
1515
* @attention
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*
17-
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.</center></h2>
17+
* Copyright (c) 2018-2021 STMicroelectronics.
18+
* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
2423
*
2524
******************************************************************************
2625
*/
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/** @addtogroup CMSIS_Device
2927
* @{
3028
*/
@@ -868,6 +866,15 @@ typedef struct
868866
* @{
869867
*/
870868

869+
/** @addtogroup Hardware_Constant_Definition
870+
* @{
871+
*/
872+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
873+
874+
/**
875+
* @}
876+
*/
877+
871878
/** @addtogroup Peripheral_Registers_Bits_Definition
872879
* @{
873880
*/
@@ -2355,7 +2362,6 @@ typedef struct
23552362
#define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000010 */
23562363
#define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000020 */
23572364
#define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000040 */
2358-
#define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos) /*!< 0x00000080 */
23592365
#define DMAMUX_CxCR_SOIE_Pos (8U)
23602366
#define DMAMUX_CxCR_SOIE_Msk (0x1UL << DMAMUX_CxCR_SOIE_Pos) /*!< 0x00000100 */
23612367
#define DMAMUX_CxCR_SOIE DMAMUX_CxCR_SOIE_Msk /*!< Synchro overrun interrupt enable */

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