Skip to content

Commit b97ac0c

Browse files
0xc01700xc0170
authored
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE
STM32L4 : code cleanup in MSI SetSysClock
2 parents 0cd4315 + b5c258e commit b97ac0c

File tree

11 files changed

+110
-22
lines changed

11 files changed

+110
-22
lines changed

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -322,15 +322,19 @@ uint8_t SetSysClock_PLL_MSI(void)
322322
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
323323
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
324324

325+
#if MBED_CONF_TARGET_LSE_AVAILABLE
325326
// Enable LSE Oscillator to automatically calibrate the MSI clock
326327
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
327328
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
328329
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
329-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
330-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
330+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
331+
return 0; // FAIL
331332
}
332333

334+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
333335
HAL_RCCEx_DisableLSECSS();
336+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
337+
334338
/* Enable MSI Oscillator and activate PLL with MSI as source */
335339
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
336340
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -349,8 +353,12 @@ uint8_t SetSysClock_PLL_MSI(void)
349353
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
350354
return 0; // FAIL
351355
}
356+
357+
#if MBED_CONF_TARGET_LSE_AVAILABLE
352358
/* Enable MSI Auto-calibration through LSE */
353359
HAL_RCCEx_EnableMSIPLLMode();
360+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
361+
354362
/* Select MSI output as USB clock source */
355363
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
356364
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -322,15 +322,19 @@ uint8_t SetSysClock_PLL_MSI(void)
322322
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
323323
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
324324

325+
#if MBED_CONF_TARGET_LSE_AVAILABLE
325326
// Enable LSE Oscillator to automatically calibrate the MSI clock
326327
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
327328
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
328329
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
329-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
330-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
330+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
331+
return 0; // FAIL
331332
}
332333

334+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
333335
HAL_RCCEx_DisableLSECSS();
336+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
337+
334338
/* Enable MSI Oscillator and activate PLL with MSI as source */
335339
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
336340
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -349,8 +353,12 @@ uint8_t SetSysClock_PLL_MSI(void)
349353
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
350354
return 0; // FAIL
351355
}
356+
357+
#if MBED_CONF_TARGET_LSE_AVAILABLE
352358
/* Enable MSI Auto-calibration through LSE */
353359
HAL_RCCEx_EnableMSIPLLMode();
360+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
361+
354362
/* Select MSI output as USB clock source */
355363
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
356364
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TARGET_MTB_ADV_WISE_1510/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -322,15 +322,19 @@ uint8_t SetSysClock_PLL_MSI(void)
322322
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
323323
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
324324

325+
#if MBED_CONF_TARGET_LSE_AVAILABLE
325326
// Enable LSE Oscillator to automatically calibrate the MSI clock
326327
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
327328
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
328329
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
329-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
330-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
330+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
331+
return 0; // FAIL
331332
}
332333

334+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
333335
HAL_RCCEx_DisableLSECSS();
336+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
337+
334338
/* Enable MSI Oscillator and activate PLL with MSI as source */
335339
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
336340
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -349,8 +353,12 @@ uint8_t SetSysClock_PLL_MSI(void)
349353
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
350354
return 0; // FAIL
351355
}
356+
357+
#if MBED_CONF_TARGET_LSE_AVAILABLE
352358
/* Enable MSI Auto-calibration through LSE */
353359
HAL_RCCEx_EnableMSIPLLMode();
360+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
361+
354362
/* Select MSI output as USB clock source */
355363
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
356364
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,15 +309,19 @@ uint8_t SetSysClock_PLL_MSI(void)
309309
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
310310
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
311311

312+
#if MBED_CONF_TARGET_LSE_AVAILABLE
312313
// Enable LSE Oscillator to automatically calibrate the MSI clock
313314
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
314315
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
315316
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
316-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
317-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
317+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
318+
return 0; // FAIL
318319
}
319320

321+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
320322
HAL_RCCEx_DisableLSECSS();
323+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
324+
321325
/* Enable MSI Oscillator and activate PLL with MSI as source */
322326
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
323327
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -336,8 +340,12 @@ uint8_t SetSysClock_PLL_MSI(void)
336340
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
337341
return 0; // FAIL
338342
}
343+
344+
#if MBED_CONF_TARGET_LSE_AVAILABLE
339345
/* Enable MSI Auto-calibration through LSE */
340346
HAL_RCCEx_EnableMSIPLLMode();
347+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
348+
341349
/* Select MSI output as USB clock source */
342350
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
343351
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,15 +309,19 @@ uint8_t SetSysClock_PLL_MSI(void)
309309
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
310310
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
311311

312+
#if MBED_CONF_TARGET_LSE_AVAILABLE
312313
// Enable LSE Oscillator to automatically calibrate the MSI clock
313314
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
314315
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
315316
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
316-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
317-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
317+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
318+
return 0; // FAIL
318319
}
319320

321+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
320322
HAL_RCCEx_DisableLSECSS();
323+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
324+
321325
/* Enable MSI Oscillator and activate PLL with MSI as source */
322326
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
323327
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -336,8 +340,12 @@ uint8_t SetSysClock_PLL_MSI(void)
336340
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
337341
return 0; // FAIL
338342
}
343+
344+
#if MBED_CONF_TARGET_LSE_AVAILABLE
339345
/* Enable MSI Auto-calibration through LSE */
340346
HAL_RCCEx_EnableMSIPLLMode();
347+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
348+
341349
/* Select MSI output as USB clock source */
342350
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
343351
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,15 +309,19 @@ uint8_t SetSysClock_PLL_MSI(void)
309309
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
310310
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
311311

312+
#if MBED_CONF_TARGET_LSE_AVAILABLE
312313
// Enable LSE Oscillator to automatically calibrate the MSI clock
313314
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
314315
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
315316
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
316-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
317-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
317+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
318+
return 0; // FAIL
318319
}
319320

321+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
320322
HAL_RCCEx_DisableLSECSS();
323+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
324+
321325
/* Enable MSI Oscillator and activate PLL with MSI as source */
322326
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
323327
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -336,8 +340,12 @@ uint8_t SetSysClock_PLL_MSI(void)
336340
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
337341
return 0; // FAIL
338342
}
343+
344+
#if MBED_CONF_TARGET_LSE_AVAILABLE
339345
/* Enable MSI Auto-calibration through LSE */
340346
HAL_RCCEx_EnableMSIPLLMode();
347+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
348+
341349
/* Select MSI output as USB clock source */
342350
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
343351
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_SILICA_SENSOR_NODE/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,15 +309,19 @@ uint8_t SetSysClock_PLL_MSI(void)
309309
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
310310
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
311311

312+
#if MBED_CONF_TARGET_LSE_AVAILABLE
312313
// Enable LSE Oscillator to automatically calibrate the MSI clock
313314
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
314315
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
315316
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
316-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
317-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
317+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
318+
return 0; // FAIL
318319
}
319320

321+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
320322
HAL_RCCEx_DisableLSECSS();
323+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
324+
321325
/* Enable MSI Oscillator and activate PLL with MSI as source */
322326
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
323327
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -336,8 +340,12 @@ uint8_t SetSysClock_PLL_MSI(void)
336340
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
337341
return 0; // FAIL
338342
}
343+
344+
#if MBED_CONF_TARGET_LSE_AVAILABLE
339345
/* Enable MSI Auto-calibration through LSE */
340346
HAL_RCCEx_EnableMSIPLLMode();
347+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
348+
341349
/* Select MSI output as USB clock source */
342350
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
343351
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_MTB_ADV_WISE_1570/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -321,15 +321,19 @@ uint8_t SetSysClock_PLL_MSI(void)
321321
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
322322
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
323323

324+
#if MBED_CONF_TARGET_LSE_AVAILABLE
324325
// Enable LSE Oscillator to automatically calibrate the MSI clock
325326
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
326327
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
327328
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
328-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
329-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
329+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
330+
return 0; // FAIL
330331
}
331332

333+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
332334
HAL_RCCEx_DisableLSECSS();
335+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
336+
333337
/* Enable MSI Oscillator and activate PLL with MSI as source */
334338
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
335339
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -348,8 +352,12 @@ uint8_t SetSysClock_PLL_MSI(void)
348352
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
349353
return 0; // FAIL
350354
}
355+
356+
#if MBED_CONF_TARGET_LSE_AVAILABLE
351357
/* Enable MSI Auto-calibration through LSE */
352358
HAL_RCCEx_EnableMSIPLLMode();
359+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
360+
353361
/* Select MSI output as USB clock source */
354362
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
355363
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,15 +309,19 @@ uint8_t SetSysClock_PLL_MSI(void)
309309
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
310310
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
311311

312+
#if MBED_CONF_TARGET_LSE_AVAILABLE
312313
// Enable LSE Oscillator to automatically calibrate the MSI clock
313314
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
314315
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
315316
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
316-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
317-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
317+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
318+
return 0; // FAIL
318319
}
319320

321+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
320322
HAL_RCCEx_DisableLSECSS();
323+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
324+
321325
/* Enable MSI Oscillator and activate PLL with MSI as source */
322326
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
323327
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -336,8 +340,12 @@ uint8_t SetSysClock_PLL_MSI(void)
336340
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
337341
return 0; // FAIL
338342
}
343+
344+
#if MBED_CONF_TARGET_LSE_AVAILABLE
339345
/* Enable MSI Auto-calibration through LSE */
340346
HAL_RCCEx_EnableMSIPLLMode();
347+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
348+
341349
/* Select MSI output as USB clock source */
342350
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
343351
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/system_clock.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -323,15 +323,19 @@ uint8_t SetSysClock_PLL_MSI(void)
323323
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
324324
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
325325

326+
#if MBED_CONF_TARGET_LSE_AVAILABLE
326327
// Enable LSE Oscillator to automatically calibrate the MSI clock
327328
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
328329
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
329330
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
330-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
331-
RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
331+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
332+
return 0; // FAIL
332333
}
333334

335+
/* Enable the CSS interrupt in case LSE signal is corrupted or not present */
334336
HAL_RCCEx_DisableLSECSS();
337+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
338+
335339
/* Enable MSI Oscillator and activate PLL with MSI as source */
336340
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
337341
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -349,8 +353,12 @@ uint8_t SetSysClock_PLL_MSI(void)
349353
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
350354
return 0; // FAIL
351355
}
356+
357+
#if MBED_CONF_TARGET_LSE_AVAILABLE
352358
/* Enable MSI Auto-calibration through LSE */
353359
HAL_RCCEx_EnableMSIPLLMode();
360+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
361+
354362
/* Select MSI output as USB clock source */
355363
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
356364
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */

0 commit comments

Comments
 (0)