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jeromecoutantjeromecoutant
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STM32 common filess astyle
1 parent 8b1cd98 commit c02cb71

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9 files changed

+109
-106
lines changed

9 files changed

+109
-106
lines changed

‎targets/TARGET_STM/USBPhy_STM32.cpp

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -250,13 +250,13 @@ void USBPhyHw::init(USBPhyEvents *events)
250250

251251
__HAL_RCC_USB_OTG_HS_CLK_ENABLE();
252252

253-
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
254-
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
255-
#endif
256-
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
257-
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
258-
#endif
259-
253+
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
254+
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
255+
#endif
256+
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
257+
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
258+
#endif
259+
260260
map = PinMap_USB_HS;
261261

262262
#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_FS)
@@ -267,13 +267,13 @@ void USBPhyHw::init(USBPhyEvents *events)
267267

268268
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
269269

270-
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
271-
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
272-
#endif
273-
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
274-
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
275-
#endif
276-
270+
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
271+
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
272+
#endif
273+
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
274+
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
275+
#endif
276+
277277
map = PinMap_USB_FS;
278278

279279
#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG)

‎targets/TARGET_STM/can_api.c

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -142,13 +142,13 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
142142
// !When the sample point should be lower than 50%, this must be changed to
143143
// !IS_FDCAN_NOMINAL_TSEG2(ntq/nominalPrescaler), since
144144
// NTSEG2 and SJW max values are lower. For now the sample point is fix @75%
145-
while (!IS_FDCAN_NOMINAL_TSEG1(ntq/nominalPrescaler)){
145+
while (!IS_FDCAN_NOMINAL_TSEG1(ntq / nominalPrescaler)) {
146146
nominalPrescaler ++;
147-
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)){
147+
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)) {
148148
error("Could not determine good nominalPrescaler. Bad clock value\n");
149149
}
150150
}
151-
ntq = ntq/nominalPrescaler;
151+
ntq = ntq / nominalPrescaler;
152152

153153
obj->CanHandle.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
154154
obj->CanHandle.Init.Mode = FDCAN_MODE_NORMAL;
@@ -298,13 +298,13 @@ int can_frequency(can_t *obj, int f)
298298
// !When the sample point should be lower than 50%, this must be changed to
299299
// !IS_FDCAN_DATA_TSEG2(ntq/nominalPrescaler), since
300300
// NTSEG2 and SJW max values are lower. For now the sample point is fix @75%
301-
while (!IS_FDCAN_DATA_TSEG1(ntq/nominalPrescaler)){
301+
while (!IS_FDCAN_DATA_TSEG1(ntq / nominalPrescaler)) {
302302
nominalPrescaler ++;
303-
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)){
303+
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)) {
304304
error("Could not determine good nominalPrescaler. Bad clock value\n");
305305
}
306306
}
307-
ntq = ntq/nominalPrescaler;
307+
ntq = ntq / nominalPrescaler;
308308

309309
obj->CanHandle.Init.NominalPrescaler = nominalPrescaler;
310310
obj->CanHandle.Init.NominalTimeSeg1 = ntq * 0.75; // Phase_segment_1
@@ -596,7 +596,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
596596
#ifndef TARGET_STM32G4
597597
interrupts = FDCAN_IT_RX_BUFFER_NEW_MESSAGE;
598598
#else
599-
interrupts = FDCAN_IT_RX_FIFO0_NEW_MESSAGE;
599+
interrupts = FDCAN_IT_RX_FIFO0_NEW_MESSAGE;
600600
#endif
601601
break;
602602
case IRQ_ERROR:
@@ -1102,7 +1102,7 @@ int can_mode(can_t *obj, CanMode mode)
11021102
int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle)
11031103
{
11041104
int success = 0;
1105-
1105+
11061106
// filter for CANAny format cannot be configured for STM32
11071107
if ((format == CANStandard) || (format == CANExtended)) {
11081108
CAN_FilterConfTypeDef sFilterConfig;
@@ -1126,8 +1126,7 @@ int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t
11261126
sFilterConfig.FilterActivation = ENABLE;
11271127
sFilterConfig.BankNumber = 14;
11281128

1129-
if (HAL_CAN_ConfigFilter(&obj->CanHandle, &sFilterConfig) == HAL_OK)
1130-
{
1129+
if (HAL_CAN_ConfigFilter(&obj->CanHandle, &sFilterConfig) == HAL_OK) {
11311130
success = 1;
11321131
}
11331132
}

‎targets/TARGET_STM/hal_tick_overrides.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ uint32_t HAL_GetTick()
7171
prev_tick_remainder = elapsed_time % 1000;
7272
}
7373
total_ticks += elapsed_ticks;
74-
74+
7575
core_util_critical_section_exit();
7676
return total_ticks;
7777
}

‎targets/TARGET_STM/lp_ticker.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -285,7 +285,7 @@ void lp_ticker_init(void)
285285

286286
#if (LPTIM_MST_BASE == LPTIM1_BASE)
287287
#if defined (__HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT)
288-
__HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT();
288+
__HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT();
289289
#endif
290290
#endif
291291
#if defined (__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT)

‎targets/TARGET_STM/mbed_overrides.c

Lines changed: 19 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -41,30 +41,31 @@ extern void SetSysClock(void);
4141

4242
/**
4343
* @brief configure the LSE crystal driver load
44-
* This settings ist target hardware dependend and
44+
* This setting is target hardware dependend and
4545
* depends on the crystal that is used for LSE clock.
4646
* For low power requirements, crystals with low load capacitors can be used and
4747
* driver setting is RCC_LSEDRIVE_LOW.
4848
* For higher stablity, crystals with higher load capacitys can be used and
4949
* driver setting is RCC_LSEDRIVE_HIGH.
50-
*
50+
*
5151
* A detailed description about this setting can be found here:
5252
* https://www.st.com/resource/en/application_note/cd00221665-oscillator-design-guide-for-stm8afals-stm32-mcus-and-mpus-stmicroelectronics.pdf
53-
*
54-
* LSE maybe used later, but crystal load drive setting is necessary before
53+
*
54+
* LSE maybe used later, but crystal load drive setting is necessary before
5555
* enabling LSE.
56-
*
56+
*
5757
* @param None
5858
* @retval None
5959
*/
6060

61-
static void LSEDriveConfig(void) {
61+
static void LSEDriveConfig(void)
62+
{
6263
HAL_PWR_EnableBkUpAccess();
63-
#if defined(__HAL_RCC_LSEDRIVE_CONFIG)
64-
__HAL_RCC_LSEDRIVE_CONFIG(LSE_DRIVE_LOAD_LEVEL);
65-
#else
66-
HAL_RCCEx_SelectLSEMode(LSE_DRIVE_LOAD_LEVEL);
67-
#endif
64+
#if defined(__HAL_RCC_LSEDRIVE_CONFIG)
65+
__HAL_RCC_LSEDRIVE_CONFIG(LSE_DRIVE_LOAD_LEVEL);
66+
#else
67+
HAL_RCCEx_SelectLSEMode(LSE_DRIVE_LOAD_LEVEL);
68+
#endif
6869
}
6970
#endif // LSE_CONFIG_AVAILABLE
7071

@@ -79,13 +80,15 @@ static void LSEDriveConfig(void) {
7980
* @param None
8081
* @retval None
8182
*/
82-
MBED_WEAK void TargetBSP_Init(void) {
83+
MBED_WEAK void TargetBSP_Init(void)
84+
{
8385
/** Do nothing */
8486
}
8587

8688
#ifndef MBED_DEBUG
8789
#if MBED_CONF_TARGET_GPIO_RESET_AT_INIT
88-
void GPIO_Full_Init(void) {
90+
void GPIO_Full_Init(void)
91+
{
8992
GPIO_InitTypeDef GPIO_InitStruct;
9093

9194
GPIO_InitStruct.Pin = GPIO_PIN_All;
@@ -238,7 +241,7 @@ void mbed_sdk_init()
238241
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
239242
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
240243
#else
241-
#error system_power_supply not configured
244+
#error system_power_supply not configured
242245
#endif
243246
#endif
244247

@@ -276,7 +279,7 @@ void mbed_sdk_init()
276279
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
277280
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
278281
#else
279-
#error system_power_supply not configured
282+
#error system_power_supply not configured
280283
#endif
281284
#endif
282285

@@ -290,8 +293,7 @@ void mbed_sdk_init()
290293
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
291294
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
292295
PeriphClkInitStruct.RTCClockSelection = (RCC_RTCCLKSOURCE_HSE_DIVX | RTC_HSE_DIV << 16);
293-
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
294-
{
296+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
295297
error("PeriphClkInitStruct RTC failed with HSE\n");
296298
}
297299
#elif ((MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) && !MBED_CONF_TARGET_LSE_AVAILABLE) || (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSI)

‎targets/TARGET_STM/ospi_api.c

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ ospi_status_t ospi_prepare_command(const ospi_command_t *command, OSPI_RegularCm
6565
st_command->Instruction = 0;
6666
} else {
6767
st_command->Instruction = ((command->instruction.bus_width == OSPI_CFG_BUS_OCTA) || (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR))
68-
? command->instruction.value << 8 | (0xFF - command->instruction.value) : command->instruction.value;
68+
? command->instruction.value << 8 | (0xFF - command->instruction.value) : command->instruction.value;
6969
switch (command->instruction.bus_width) {
7070
case OSPI_CFG_BUS_SINGLE:
7171
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
@@ -87,14 +87,14 @@ ospi_status_t ospi_prepare_command(const ospi_command_t *command, OSPI_RegularCm
8787
}
8888

8989
st_command->InstructionSize = (st_command->InstructionMode == HAL_OSPI_INSTRUCTION_8_LINES) ? HAL_OSPI_INSTRUCTION_16_BITS : HAL_OSPI_INSTRUCTION_8_BITS;
90-
st_command->InstructionDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_INSTRUCTION_DTR_ENABLE :HAL_OSPI_INSTRUCTION_DTR_DISABLE;
90+
st_command->InstructionDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_INSTRUCTION_DTR_ENABLE : HAL_OSPI_INSTRUCTION_DTR_DISABLE;
9191
st_command->DummyCycles = command->dummy_count;
9292
// these are target specific settings, use default values
9393
st_command->SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
9494
st_command->DataDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_DATA_DTR_ENABLE : HAL_OSPI_DATA_DTR_DISABLE;
9595
st_command->AddressDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_ADDRESS_DTR_ENABLE : HAL_OSPI_ADDRESS_DTR_DISABLE;
9696
st_command->AlternateBytesDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_ALTERNATE_BYTES_DTR_ENABLE : HAL_OSPI_ALTERNATE_BYTES_DTR_DISABLE;
97-
st_command->DQSMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_DQS_ENABLE :HAL_OSPI_DQS_DISABLE;
97+
st_command->DQSMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_DQS_ENABLE : HAL_OSPI_DQS_DISABLE;
9898

9999
st_command->OperationType = HAL_OSPI_OPTYPE_COMMON_CFG;
100100
if (command->address.disabled == true) {
@@ -245,7 +245,7 @@ static ospi_status_t _ospi_init_direct(ospi_t *obj, const ospi_pinmap_t *pinmap,
245245
// Set default OCTOSPI handle values
246246
obj->handle.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
247247
//#if defined(TARGET_MX25LM512451G)
248-
// obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MACRONIX; // Read sequence in DTR mode: D1-D0-D3-D2
248+
// obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MACRONIX; // Read sequence in DTR mode: D1-D0-D3-D2
249249
//#else
250250
obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON; // Read sequence in DTR mode: D0-D1-D2-D3
251251
//#endif
@@ -365,7 +365,7 @@ static ospi_status_t _ospi_init_direct(ospi_t *obj, const ospi_pinmap_t *pinmap,
365365
}
366366

367367
ospi_status_t ospi_init(ospi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName io4, PinName io5, PinName io6, PinName io7,
368-
PinName sclk, PinName ssel, PinName dqs, uint32_t hz, uint8_t mode)
368+
PinName sclk, PinName ssel, PinName dqs, uint32_t hz, uint8_t mode)
369369
{
370370
OSPIName ospiio0name = (OSPIName)pinmap_peripheral(io0, PinMap_OSPI_DATA0);
371371
OSPIName ospiio1name = (OSPIName)pinmap_peripheral(io1, PinMap_OSPI_DATA1);
@@ -403,8 +403,9 @@ ospi_status_t ospi_init(ospi_t *obj, PinName io0, PinName io1, PinName io2, PinN
403403
int function_dqs = (int)pinmap_find_function(dqs, PinMap_OSPI_DQS);
404404

405405
const ospi_pinmap_t static_pinmap = {peripheral, io0, function_io0, io1, function_io1, io2, function_io2, io3, function_io3,
406-
io4, function_io4, io5, function_io5, io6, function_io6, io7, function_io7,
407-
sclk, function_sclk, ssel, function_ssel, dqs, function_dqs};
406+
io4, function_io4, io5, function_io5, io6, function_io6, io7, function_io7,
407+
sclk, function_sclk, ssel, function_ssel, dqs, function_dqs
408+
};
408409

409410
return OSPI_INIT_DIRECT(obj, &static_pinmap, hz, mode);
410411
}

‎targets/TARGET_STM/serial_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -354,10 +354,10 @@ void serial_free(serial_t *obj)
354354
pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
355355
pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
356356
#if DEVICE_SERIAL_FC
357-
if ( (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS) ) {
357+
if ((obj_s->hw_flow_ctl == UART_HWCONTROL_RTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS)) {
358358
pin_function(obj_s->pin_rts, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
359359
}
360-
if ( (obj_s->hw_flow_ctl == UART_HWCONTROL_CTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS) ) {
360+
if ((obj_s->hw_flow_ctl == UART_HWCONTROL_CTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS)) {
361361
pin_function(obj_s->pin_cts, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
362362
}
363363
#endif

‎targets/TARGET_STM/sleep.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -181,7 +181,7 @@ __WEAK void hal_deepsleep(void)
181181
save_timer_ctx();
182182

183183
// Request to enter STOP mode with regulator in low power mode
184-
//PWR_CR1_LPMS_STOP2 -> STM32L4 ; PWR_LOWPOWERMODE_STOP2 -> STM32WL
184+
//PWR_CR1_LPMS_STOP2 -> STM32L4 ; PWR_LOWPOWERMODE_STOP2 -> STM32WL
185185
#if defined (PWR_CR1_LPMS_STOP2) || defined(PWR_LOWPOWERMODE_STOP2)
186186
int pwrClockEnabled = __HAL_RCC_PWR_IS_CLK_ENABLED();
187187
int lowPowerModeEnabled = PWR->CR1 & PWR_CR1_LPR;

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