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STM32: I2C: Add-up irq handlers
With this commit we define I2C irq handlers that can be used by the driver in sync mode. This also provides a mecanism for enabling and/or disabling these handlers Those handlers will be superseded by MBED ones in case of async mode usage.
1 parent 490437a commit c2060e3

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2 files changed

+131
-11
lines changed

2 files changed

+131
-11
lines changed

targets/TARGET_STM/TARGET_STM32F4/common_objects.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,7 @@ struct i2c_s {
9090
*/
9191
I2CName i2c;
9292
I2C_HandleTypeDef handle;
93+
uint8_t index;
9394
IRQn_Type event_i2cIRQ;
9495
IRQn_Type error_i2cIRQ;
9596
uint8_t slave;

targets/TARGET_STM/TARGET_STM32F4/i2c_api.c

Lines changed: 130 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,111 @@
4848
#define I2C_S(obj) (struct i2c_s *) (obj)
4949
#endif
5050

51+
/* could be defined at family level */
52+
#define I2C_NUM (5)
53+
static I2C_HandleTypeDef* i2c_handles[I2C_NUM];
54+
55+
static void i2c1_irq(void)
56+
{
57+
I2C_HandleTypeDef * handle = i2c_handles[0];
58+
HAL_I2C_EV_IRQHandler(handle);
59+
HAL_I2C_ER_IRQHandler(handle);
60+
}
61+
62+
static void i2c2_irq(void)
63+
{
64+
I2C_HandleTypeDef * handle = i2c_handles[1];
65+
HAL_I2C_EV_IRQHandler(handle);
66+
HAL_I2C_ER_IRQHandler(handle);
67+
}
68+
69+
#if defined(I2C3_BASE)
70+
static void i2c3_irq(void)
71+
{
72+
I2C_HandleTypeDef * handle = i2c_handles[2];
73+
HAL_I2C_EV_IRQHandler(handle);
74+
HAL_I2C_ER_IRQHandler(handle);
75+
}
76+
#endif
77+
#if defined(I2C4_BASE)
78+
static void i2c4_irq(void)
79+
{
80+
I2C_HandleTypeDef * handle = i2c_handles[3];
81+
HAL_I2C_EV_IRQHandler(handle);
82+
HAL_I2C_ER_IRQHandler(handle);
83+
}
84+
#endif
85+
#if defined(FMPI2C1_BASE)
86+
static void i2c5_irq(void)
87+
{
88+
I2C_HandleTypeDef * handle = i2c_handles[4];
89+
HAL_I2C_EV_IRQHandler(handle);
90+
HAL_I2C_ER_IRQHandler(handle);
91+
}
92+
#endif
93+
94+
void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) {
95+
struct i2c_s *obj_s = I2C_S(obj);
96+
IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
97+
IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
98+
99+
/* Set up event IT using IRQ and handler tables */
100+
NVIC_SetVector(irq_event_n, handler);
101+
HAL_NVIC_SetPriority(irq_event_n, 0, 0);
102+
HAL_NVIC_EnableIRQ(irq_event_n);
103+
/* Set up error IT using IRQ and handler tables */
104+
NVIC_SetVector(irq_error_n, handler);
105+
HAL_NVIC_SetPriority(irq_error_n, 0, 1);
106+
HAL_NVIC_EnableIRQ(irq_error_n);
107+
}
108+
109+
void i2c_ev_err_disable(i2c_t *obj) {
110+
struct i2c_s *obj_s = I2C_S(obj);
111+
IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
112+
IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
113+
114+
HAL_NVIC_DisableIRQ(irq_event_n);
115+
HAL_NVIC_DisableIRQ(irq_error_n);
116+
}
117+
118+
void i2c_irq_set(i2c_t *obj, uint32_t enable)
119+
{
120+
struct i2c_s *obj_s = I2C_S(obj);
121+
I2C_HandleTypeDef *handle = &(obj_s->handle);
122+
uint32_t handler = 0;
123+
124+
switch (obj_s->index) {
125+
case 0:
126+
handler = (uint32_t)&i2c1_irq;
127+
break;
128+
case 1:
129+
handler = (uint32_t)&i2c2_irq;
130+
break;
131+
#if defined(I2C3_BASE)
132+
case 2:
133+
handler = (uint32_t)&i2c3_irq;
134+
break;
135+
#endif
136+
#if defined(I2C4_BASE)
137+
case 3:
138+
handler = (uint32_t)&i2c4_irq;
139+
break;
140+
#endif
141+
#if defined(FMPI2C1_BASE)
142+
case 4:
143+
handler = (uint32_t)&i2c5_irq;
144+
break;
145+
#endif
146+
}
147+
148+
if (enable) {
149+
i2c_handles[obj_s->index] = handle;
150+
i2c_ev_err_enable(obj, handler);
151+
} else { // disable
152+
i2c_ev_err_disable(obj);
153+
i2c_handles[obj_s->index] = 0;
154+
}
155+
}
51156

52157
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
53158

@@ -62,58 +167,67 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
62167

63168
// Enable I2C1 clock and pinout if not done
64169
if (obj_s->i2c == I2C_1) {
170+
obj_s->index = 0;
65171
// Configure I2C pins
66172
pinmap_pinout(sda, PinMap_I2C_SDA);
67173
pinmap_pinout(scl, PinMap_I2C_SCL);
68174
pin_mode(sda, PullUp);
69175
pin_mode(scl, PullUp);
70-
#if DEVICE_I2C_ASYNCH
71176
obj_s->event_i2cIRQ = I2C1_EV_IRQn;
72177
obj_s->error_i2cIRQ = I2C1_ER_IRQn;
73-
#endif
74178
__I2C1_CLK_ENABLE();
75179
}
76180
// Enable I2C2 clock and pinout if not done
77181
if (obj_s->i2c == I2C_2) {
182+
obj_s->index = 1;
78183
// Configure I2C pins
79184
pinmap_pinout(sda, PinMap_I2C_SDA);
80185
pinmap_pinout(scl, PinMap_I2C_SCL);
81186
pin_mode(sda, PullUp);
82187
pin_mode(scl, PullUp);
83-
#if DEVICE_I2C_ASYNCH
84188
obj_s->event_i2cIRQ = I2C2_EV_IRQn;
85189
obj_s->error_i2cIRQ = I2C2_ER_IRQn;
86-
#endif
87190
__I2C2_CLK_ENABLE();
88191
}
89192
#if defined I2C3_BASE
90193
// Enable I2C3 clock and pinout if not done
91194
if (obj_s->i2c == I2C_3) {
195+
obj_s->index = 2;
92196
// Configure I2C pins
93197
pinmap_pinout(sda, PinMap_I2C_SDA);
94198
pinmap_pinout(scl, PinMap_I2C_SCL);
95199
pin_mode(sda, PullUp);
96200
pin_mode(scl, PullUp);
97-
#if DEVICE_I2C_ASYNCH
98201
obj_s->event_i2cIRQ = I2C3_EV_IRQn;
99202
obj_s->error_i2cIRQ = I2C3_ER_IRQn;
100-
#endif
101203
__I2C3_CLK_ENABLE();
102204
}
103205
#endif
104-
206+
#if defined I2C4_BASE
207+
// Enable clock and pinout if not done
208+
if (obj_s->i2c == I2C_4) {
209+
obj_s->index = 3;
210+
// Configure I2C pins
211+
pinmap_pinout(sda, PinMap_I2C_SDA);
212+
pinmap_pinout(scl, PinMap_I2C_SCL);
213+
pin_mode(sda, PullUp);
214+
pin_mode(scl, PullUp);
215+
obj_s->event_i2cIRQ = I2C4_EV_IRQn;
216+
obj_s->error_i2cIRQ = I2C4_ER_IRQn;
217+
__I2C4_CLK_ENABLE();
218+
}
219+
#endif
105220
#if defined FMPI2C1_BASE
106-
// Enable I2C3 clock and pinout if not done
221+
// Enable clock and pinout if not done
107222
if (obj_s->i2c == FMPI2C_1) {
223+
obj_s->index = 3;
108224
// Configure I2C pins
109225
pinmap_pinout(sda, PinMap_I2C_SDA);
110226
pinmap_pinout(scl, PinMap_I2C_SCL);
111227
pin_mode(sda, PullUp);
112228
pin_mode(scl, PullUp);
113-
#if DEVICE_I2C_ASYNCH
114229
obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn;
115230
obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn;
116-
#endif
117231
__HAL_RCC_FMPI2C1_CLK_ENABLE();
118232
}
119233
#endif
@@ -396,7 +510,12 @@ void i2c_reset(i2c_t *obj) {
396510
__I2C3_RELEASE_RESET();
397511
}
398512
#endif
399-
513+
#if defined I2C4_BASE
514+
if (obj_s->i2c == I2C_4) {
515+
__I2C4_FORCE_RESET();
516+
__I2C4_RELEASE_RESET();
517+
}
518+
#endif
400519
#if defined FMPI2C1_BASE
401520
if (obj_s->i2c == FMPI2C_1) {
402521
__HAL_RCC_FMPI2C1_FORCE_RESET();

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