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cypress: psoc64: Add TF-M compatibility
Make the CY8CKIT_064S2_4343W target TF-M compatible by addding flash and region definitions from TF-M (at c4f37c18c4a0) and by updating the CY8CKIT_064S2_4343W linker script to create a flash image compatible with TF-M. Signed-off-by: Jaeden Amero <[email protected]>
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targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4.sct

Lines changed: 29 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@
2727
;*******************************************************************************
2828
;* \copyright
2929
;* Copyright 2016-2019 Cypress Semiconductor Corporation
30+
;* Copyright 2020 Arm Limited
3031
;* SPDX-License-Identifier: Apache-2.0
3132
;*
3233
;* Licensed under the Apache License, Version 2.0 (the "License");
@@ -42,8 +43,10 @@
4243
;* limitations under the License.
4344
;******************************************************************************/
4445

46+
#include "../../../partition/region_defs.h"
47+
4548
#if !defined(MBED_ROM_START)
46-
#define MBED_ROM_START 0x10000000
49+
#define MBED_ROM_START NS_CODE_START
4750
#endif
4851

4952
;* MBED_APP_START is being used by the bootloader build script and
@@ -55,7 +58,7 @@
5558
#endif
5659

5760
#if !defined(MBED_ROM_SIZE)
58-
#define MBED_ROM_SIZE 0x001D0000
61+
#define MBED_ROM_SIZE NS_CODE_SIZE
5962
#endif
6063

6164
;* MBED_APP_SIZE is being used by the bootloader build script and
@@ -67,19 +70,19 @@
6770
#endif
6871

6972
#if !defined(MBED_RAM_START)
70-
#define MBED_RAM_START 0x08000000
73+
#define MBED_RAM_START NS_DATA_START
7174
#endif
7275

7376
#if !defined(MBED_RAM_SIZE)
74-
#define MBED_RAM_SIZE 0x000EA000
77+
#define MBED_RAM_SIZE NS_DATA_SIZE
7578
#endif
7679

7780
#if !defined(MBED_BOOT_STACK_SIZE)
78-
#define MBED_BOOT_STACK_SIZE 0x400
81+
#define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
7982
#endif
8083

81-
; The size of the stack section at the end of CM4 SRAM
82-
#define STACK_SIZE MBED_BOOT_STACK_SIZE
84+
; Shared memory area between Non-secure and Secure
85+
#define MBED_DATA_SHARED_SIZE NS_DATA_SHARED_SIZE
8386

8487
; The defines below describe the location and size of blocks of memory in the target.
8588
; Use these defines to specify the memory regions available for allocation.
@@ -92,9 +95,6 @@
9295
#define FLASH_START MBED_APP_START
9396
#define FLASH_SIZE MBED_APP_SIZE
9497

95-
; The size of the MCU boot header area at the start of FLASH
96-
#define BOOT_HEADER_SIZE 0x00000400
97-
9898
; The following defines describe a 32K flash region used for EEPROM emulation.
9999
; This region can also be used as the general purpose flash.
100100
; You can assign sections to this memory region for only one of the cores.
@@ -136,7 +136,7 @@
136136
; Cortex-M4 application flash area
137137
LR_IROM1 FLASH_START FLASH_SIZE
138138
{
139-
ER_FLASH_VECTORS +BOOT_HEADER_SIZE
139+
ER_FLASH_VECTORS +0
140140
{
141141
* (RESET, +FIRST)
142142
}
@@ -166,15 +166,27 @@ LR_IROM1 FLASH_START FLASH_SIZE
166166
}
167167

168168
; Application heap area (HEAP)
169-
ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-ImageLimit(RW_IRAM1)
170-
{
169+
ARM_LIB_HEAP +0 ALIGN 4 EMPTY RAM_START+RAM_SIZE-MBED_BOOT_STACK_SIZE-MBED_DATA_SHARED_SIZE-ImageLimit(RW_IRAM1)
170+
{
171171
}
172-
172+
173173
; Stack region growing down
174-
ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -STACK_SIZE
174+
ARM_LIB_STACK RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY -MBED_BOOT_STACK_SIZE
175+
{
176+
}
177+
178+
; Stack area overflowed within RAM
179+
ScatterAssert(ImageBase(ARM_LIB_STACK) + ImageLength(ARM_LIB_STACK) == RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE)
180+
181+
; Shared region
182+
ARM_LIB_SHARED RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY MBED_DATA_SHARED_SIZE
175183
{
176-
}
177-
184+
}
185+
186+
; Shared area overflowed within RAM
187+
ScatterAssert(ImageBase(ARM_LIB_SHARED) + ImageLength(ARM_LIB_SHARED) == RAM_START+RAM_SIZE)
188+
189+
178190
; Used for the digital signature of the secure application and the
179191
; Bootloader SDK application. The size of the section depends on the required
180192
; data size.

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4.ld

Lines changed: 27 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
********************************************************************************
2121
* \copyright
2222
* Copyright 2016-2019 Cypress Semiconductor Corporation
23+
* Copyright 2020 Arm Limited
2324
* SPDX-License-Identifier: Apache-2.0
2425
*
2526
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -40,47 +41,47 @@ SEARCH_DIR(.)
4041
GROUP(-lgcc -lc -lnosys)
4142
ENTRY(Reset_Handler)
4243

44+
#include "../../../partition/region_defs.h"
45+
4346
#if !defined(MBED_ROM_START)
44-
#define MBED_ROM_START 0x10000000
47+
#define MBED_ROM_START NS_CODE_START
4548
#endif
4649

4750
/* MBED_APP_START is being used by the bootloader build script and
4851
* will be calculate by the system. Without bootloader the MBED_APP_START
4952
* is equal to MBED_ROM_START
5053
*/
5154
#if !defined(MBED_APP_START)
52-
#define MBED_APP_START MBED_ROM_START
55+
#define MBED_APP_START MBED_ROM_START
5356
#endif
5457

5558
#if !defined(MBED_ROM_SIZE)
56-
#define MBED_ROM_SIZE 0x001D0000
59+
#define MBED_ROM_SIZE NS_CODE_SIZE
5760
#endif
5861

5962
/* MBED_APP_SIZE is being used by the bootloader build script and
6063
* will be calculate by the system. Without bootloader the MBED_APP_SIZE
6164
* is equal to MBED_ROM_SIZE
6265
*/
6366
#if !defined(MBED_APP_SIZE)
64-
#define MBED_APP_SIZE MBED_ROM_SIZE
67+
#define MBED_APP_SIZE MBED_ROM_SIZE
6568
#endif
6669

6770
#if !defined(MBED_RAM_START)
68-
#define MBED_RAM_START 0x08000000
71+
#define MBED_RAM_START NS_DATA_START
6972
#endif
7073

7174
#if !defined(MBED_RAM_SIZE)
72-
#define MBED_RAM_SIZE 0x000EA000
75+
#define MBED_RAM_SIZE NS_DATA_SIZE
7376
#endif
7477

78+
/* Size of the stack section in CM4 SRAM area */
7579
#if !defined(MBED_BOOT_STACK_SIZE)
76-
#define MBED_BOOT_STACK_SIZE 0x400
80+
#define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
7781
#endif
7882

79-
/* The size of the stack section at the end of CM4 SRAM */
80-
STACK_SIZE = MBED_BOOT_STACK_SIZE;
81-
82-
/* The size of the MCU boot header area at the start of FLASH */
83-
BOOT_HEADER_SIZE = 0x400;
83+
/* Shared memory area between Non-Secure and Secure */
84+
#define MBED_DATA_SHARED_SIZE NS_DATA_SHARED_SIZE
8485

8586
/* Force symbol to be entered in the output file as an undefined symbol. Doing
8687
* this may, for example, trigger linking of additional modules from standard
@@ -157,7 +158,7 @@ GROUP(libgcc.a libc.a libm.a libnosys.a)
157158
SECTIONS
158159
{
159160
/* Cortex-M4 application flash area */
160-
.text ORIGIN(flash) + BOOT_HEADER_SIZE :
161+
.text ORIGIN(flash) :
161162
{
162163
/* Cortex-M4 flash vector table */
163164
. = ALIGN(4);
@@ -330,20 +331,26 @@ SECTIONS
330331
__end__ = .;
331332
end = __end__;
332333
KEEP(*(.heap*))
333-
. = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
334+
. = ORIGIN(ram) + LENGTH(ram) - MBED_BOOT_STACK_SIZE - MBED_DATA_SHARED_SIZE;
335+
. = ALIGN(4);
336+
__StackLimit = .;
334337
__HeapLimit = .;
335338
} > ram
336339

337340

338-
/* Set stack top to end of RAM, and stack limit move down by
339-
* size of stack_dummy section */
340-
__StackTop = ORIGIN(ram) + LENGTH(ram);
341-
__StackLimit = __StackTop - STACK_SIZE;
341+
__StackTop = (__StackLimit + MBED_BOOT_STACK_SIZE + 3) & 0xFFFFFFFC;
342342
PROVIDE(__stack = __StackTop);
343343

344-
/* Check if data + heap + stack exceeds RAM limit */
345-
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
344+
.shared __StackTop (NOLOAD):
345+
{
346+
__SharedStart = .;
347+
. += MBED_DATA_SHARED_SIZE;
348+
KEEP(*(.shared*))
349+
__SharedLimit = .;
350+
} > ram
346351

352+
/* Check if Shared area overflowed within RAM */
353+
ASSERT(__SharedLimit == ORIGIN(ram) + LENGTH(ram), "Shared area overflowed within RAM")
347354

348355
/* Used for the digital signature of the secure application and the Bootloader SDK application.
349356
* The size of the section depends on the required data size. */
Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
/*
2+
* Copyright (c) 2017-2018 Arm Limited
3+
* Copyright (c) 2020, Cypress Semiconductor Corporation. All rights reserved.
4+
*
5+
* SPDX-License-Identifier: Apache-2.0
6+
*
7+
* Licensed under the Apache License Version 2.0 (the "License");
8+
* you may not use this file except in compliance with the License.
9+
* You may obtain a copy of the License at
10+
*
11+
* http://www.apache.org/licenses/LICENSE-2.0
12+
*
13+
* Unless required by applicable law or agreed to in writing software
14+
* distributed under the License is distributed on an "AS IS" BASIS
15+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied.
16+
* See the License for the specific language governing permissions and
17+
* limitations under the License.
18+
*/
19+
20+
#ifndef __ARM_LTD_DEVICE_CFG_H__
21+
#define __ARM_LTD_DEVICE_CFG_H__
22+
23+
#ifdef TFM_MULTI_CORE_MULTI_CLIENT_CALL
24+
#define NUM_MAILBOX_QUEUE_SLOT 4
25+
#endif
26+
27+
#endif /* __ARM_LTD_DEVICE_CFG_H__ */

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