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1 parent 39f8924 commit c5b6347Copy full SHA for c5b6347
targets/TARGET_STM/TARGET_STM32G0/STM32Cube_FW/STM32G0xx_HAL_Driver/stm32g0xx_hal_wwdg.c
@@ -40,7 +40,7 @@
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(++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock
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(+) Typical values:
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(++) Counter min (T[5;0] = 0x00) at 64 MHz (PCLK1) with zero prescaler:
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- max timeout before reset: approximately 64µs
+ max timeout before reset: approximately 64us
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(++) Counter max (T[5;0] = 0x3F) at 64 MHz (PCLK1) with prescaler
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dividing by 128:
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max timeout before reset: approximately 524.28ms
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