@@ -78,51 +78,51 @@ extern "C" {
78
78
79
79
#define CG_PRCK_MASK ((uint32_t)0x00000F00) /*!< CG PRCK mask */
80
80
81
- #define CG_PRCK_1 ((uint32_t)0x00000000) /*!< CG ƒÓT0 fc register value */
82
- #define CG_PRCK_2 ((uint32_t)0x00000100) /*!< CG ƒÓT0 fc/2 register value */
83
- #define CG_PRCK_4 ((uint32_t)0x00000200) /*!< CG ƒÓT0 fc/4 register value */
84
- #define CG_PRCK_8 ((uint32_t)0x00000300) /*!< CG ƒÓT0 fc/8 register value */
85
- #define CG_PRCK_16 ((uint32_t)0x00000400) /*!< CG ƒÓT0 fc/16 register value */
86
- #define CG_PRCK_32 ((uint32_t)0x00000500) /*!< CG ƒÓT0 fc/32 register value */
87
- #define CG_PRCK_64 ((uint32_t)0x00000600) /*!< CG ƒÓT0 fc/64 register value */
88
- #define CG_PRCK_128 ((uint32_t)0x00000700) /*!< CG ƒÓT0 fc/128 register value */
89
- #define CG_PRCK_256 ((uint32_t)0x00000800) /*!< CG ƒÓT0 fc/256 register value */
90
- #define CG_PRCK_512 ((uint32_t)0x00000900) /*!< CG ƒÓT0 fc/512 register value */
81
+ #define CG_PRCK_1 ((uint32_t)0x00000000) /*!< CG phiT0 fc register value */
82
+ #define CG_PRCK_2 ((uint32_t)0x00000100) /*!< CG phiT0 fc/2 register value */
83
+ #define CG_PRCK_4 ((uint32_t)0x00000200) /*!< CG phiT0 fc/4 register value */
84
+ #define CG_PRCK_8 ((uint32_t)0x00000300) /*!< CG phiT0 fc/8 register value */
85
+ #define CG_PRCK_16 ((uint32_t)0x00000400) /*!< CG phiT0 fc/16 register value */
86
+ #define CG_PRCK_32 ((uint32_t)0x00000500) /*!< CG phiT0 fc/32 register value */
87
+ #define CG_PRCK_64 ((uint32_t)0x00000600) /*!< CG phiT0 fc/64 register value */
88
+ #define CG_PRCK_128 ((uint32_t)0x00000700) /*!< CG phiT0 fc/128 register value */
89
+ #define CG_PRCK_256 ((uint32_t)0x00000800) /*!< CG phiT0 fc/256 register value */
90
+ #define CG_PRCK_512 ((uint32_t)0x00000900) /*!< CG phiT0 fc/512 register value */
91
91
92
92
#define CG_PRCKST_MASK ((uint32_t)0x0F000000) /*!< CG PRCKST mask */
93
93
94
- #define CG_PRCKST_1 ((uint32_t)0x00000000) /*!< CG ƒÓT0 fc register status */
95
- #define CG_PRCKST_2 ((uint32_t)0x01000000) /*!< CG ƒÓT0 fc/2 register status */
96
- #define CG_PRCKST_4 ((uint32_t)0x02000000) /*!< CG ƒÓT0 fc/4 register status */
97
- #define CG_PRCKST_8 ((uint32_t)0x03000000) /*!< CG ƒÓT0 fc/8 register status */
98
- #define CG_PRCKST_16 ((uint32_t)0x04000000) /*!< CG ƒÓT0 fc/16 register status */
99
- #define CG_PRCKST_32 ((uint32_t)0x05000000) /*!< CG ƒÓT0 fc/32 register status */
100
- #define CG_PRCKST_64 ((uint32_t)0x06000000) /*!< CG ƒÓT0 fc/64 register status */
101
- #define CG_PRCKST_128 ((uint32_t)0x07000000) /*!< CG ƒÓT0 fc/128 register status */
102
- #define CG_PRCKST_256 ((uint32_t)0x08000000) /*!< CG ƒÓT0 fc/256 register status */
103
- #define CG_PRCKST_512 ((uint32_t)0x09000000) /*!< CG ƒÓT0 fc/512 register status */
104
-
105
- #define CG_PRCK_1_DIV ((uint32_t)0x00000001) /*!< CG ƒÓT0 fc division value */
106
- #define CG_PRCK_2_DIV ((uint32_t)0x00000002) /*!< CG ƒÓT0 fc/2 division value */
107
- #define CG_PRCK_4_DIV ((uint32_t)0x00000004) /*!< CG ƒÓT0 fc/4 division value */
108
- #define CG_PRCK_8_DIV ((uint32_t)0x00000008) /*!< CG ƒÓT0 fc/8 division value */
109
- #define CG_PRCK_16_DIV ((uint32_t)0x00000010) /*!< CG ƒÓT0 fc/16 division value */
110
- #define CG_PRCK_32_DIV ((uint32_t)0x00000020) /*!< CG ƒÓT0 fc/32 division value */
111
- #define CG_PRCK_64_DIV ((uint32_t)0x00000040) /*!< CG ƒÓT0 fc/64 division value */
112
- #define CG_PRCK_128_DIV ((uint32_t)0x00000080) /*!< CG ƒÓT0 fc/128 division value */
113
- #define CG_PRCK_256_DIV ((uint32_t)0x00000100) /*!< CG ƒÓT0 fc/256 division value */
114
- #define CG_PRCK_512_DIV ((uint32_t)0x00000200) /*!< CG ƒÓT0 fc/512 division value */
94
+ #define CG_PRCKST_1 ((uint32_t)0x00000000) /*!< CG phiT0 fc register status */
95
+ #define CG_PRCKST_2 ((uint32_t)0x01000000) /*!< CG phiT0 fc/2 register status */
96
+ #define CG_PRCKST_4 ((uint32_t)0x02000000) /*!< CG phiT0 fc/4 register status */
97
+ #define CG_PRCKST_8 ((uint32_t)0x03000000) /*!< CG phiT0 fc/8 register status */
98
+ #define CG_PRCKST_16 ((uint32_t)0x04000000) /*!< CG phiT0 fc/16 register status */
99
+ #define CG_PRCKST_32 ((uint32_t)0x05000000) /*!< CG phiT0 fc/32 register status */
100
+ #define CG_PRCKST_64 ((uint32_t)0x06000000) /*!< CG phiT0 fc/64 register status */
101
+ #define CG_PRCKST_128 ((uint32_t)0x07000000) /*!< CG phiT0 fc/128 register status */
102
+ #define CG_PRCKST_256 ((uint32_t)0x08000000) /*!< CG phiT0 fc/256 register status */
103
+ #define CG_PRCKST_512 ((uint32_t)0x09000000) /*!< CG phiT0 fc/512 register status */
104
+
105
+ #define CG_PRCK_1_DIV ((uint32_t)0x00000001) /*!< CG phiT0 fc division value */
106
+ #define CG_PRCK_2_DIV ((uint32_t)0x00000002) /*!< CG phiT0 fc/2 division value */
107
+ #define CG_PRCK_4_DIV ((uint32_t)0x00000004) /*!< CG phiT0 fc/4 division value */
108
+ #define CG_PRCK_8_DIV ((uint32_t)0x00000008) /*!< CG phiT0 fc/8 division value */
109
+ #define CG_PRCK_16_DIV ((uint32_t)0x00000010) /*!< CG phiT0 fc/16 division value */
110
+ #define CG_PRCK_32_DIV ((uint32_t)0x00000020) /*!< CG phiT0 fc/32 division value */
111
+ #define CG_PRCK_64_DIV ((uint32_t)0x00000040) /*!< CG phiT0 fc/64 division value */
112
+ #define CG_PRCK_128_DIV ((uint32_t)0x00000080) /*!< CG phiT0 fc/128 division value */
113
+ #define CG_PRCK_256_DIV ((uint32_t)0x00000100) /*!< CG phiT0 fc/256 division value */
114
+ #define CG_PRCK_512_DIV ((uint32_t)0x00000200) /*!< CG phiT0 fc/512 division value */
115
115
116
116
117
117
#define CG_MCKSELPST_MASK ((uint32_t)0xC0000000) /*!< CG MCKSEL mask */
118
118
119
- #define CG_MCKSELPST_1 ((uint32_t)0x00000000) /*!< CG ƒÓT0 fc/PRCK value */
120
- #define CG_MCKSELPST_2 ((uint32_t)0x40000000) /*!< CG ƒÓT0 fc/PRCK/2 value */
121
- #define CG_MCKSELPST_4 ((uint32_t)0x80000000) /*!< CG ƒÓT0 fc/PRCK/4 value */
119
+ #define CG_MCKSELPST_1 ((uint32_t)0x00000000) /*!< CG phiT0 fc/PRCK value */
120
+ #define CG_MCKSELPST_2 ((uint32_t)0x40000000) /*!< CG phiT0 fc/PRCK/2 value */
121
+ #define CG_MCKSELPST_4 ((uint32_t)0x80000000) /*!< CG phiT0 fc/PRCK/4 value */
122
122
123
- #define CG_FSYSM_1_DIV ((uint32_t)0x00000001) /*!< CG fsysm ƒÓT0 division value */
124
- #define CG_FSYSM_2_DIV ((uint32_t)0x00000002) /*!< CG fsysm ƒÓT0 /2 division value */
125
- #define CG_FSYSM_4_DIV ((uint32_t)0x00000004) /*!< CG fsysm ƒÓT0 /4 division value */
123
+ #define CG_FSYSM_1_DIV ((uint32_t)0x00000001) /*!< CG fsysm phiT0 division value */
124
+ #define CG_FSYSM_2_DIV ((uint32_t)0x00000002) /*!< CG fsysm phiT0 /2 division value */
125
+ #define CG_FSYSM_4_DIV ((uint32_t)0x00000004) /*!< CG fsysm phiT0 /4 division value */
126
126
127
127
#define CG_IHOSC_DISABLE ((uint32_t)0x00000000) /*!< Internal high-speed oscillator disable */
128
128
#define CG_IHOSC_ENABLE ((uint32_t)0x00000001) /*!< Internal high-speed oscillator enable */
@@ -284,34 +284,34 @@ uint32_t cg_get_phyt0(cg_t *p_obj)
284
284
}
285
285
286
286
switch (p_obj -> p_instance -> SYSCR & CG_PRCKST_MASK ) {
287
- case CG_PRCKST_1 : /* ƒÓT0 -> fc */
287
+ case CG_PRCKST_1 : /* phiT0 -> fc */
288
288
result /= CG_PRCK_1_DIV ;
289
289
break ;
290
- case CG_PRCKST_2 : /* ƒÓT0 -> fc/2 */
290
+ case CG_PRCKST_2 : /* phiT0 -> fc/2 */
291
291
result /= CG_PRCK_2_DIV ;
292
292
break ;
293
- case CG_PRCKST_4 : /* ƒÓT0 -> fc/4 */
293
+ case CG_PRCKST_4 : /* phiT0 -> fc/4 */
294
294
result /= CG_PRCK_4_DIV ;
295
295
break ;
296
- case CG_PRCKST_8 : /* ƒÓT0 -> fc/8 */
296
+ case CG_PRCKST_8 : /* phiT0 -> fc/8 */
297
297
result /= CG_PRCK_8_DIV ;
298
298
break ;
299
- case CG_PRCKST_16 : /* ƒÓT0 -> fc/16 */
299
+ case CG_PRCKST_16 : /* phiT0 -> fc/16 */
300
300
result /= CG_PRCK_16_DIV ;
301
301
break ;
302
- case CG_PRCKST_32 : /* ƒÓT0 -> fc/32 */
302
+ case CG_PRCKST_32 : /* phiT0 -> fc/32 */
303
303
result /= CG_PRCK_32_DIV ;
304
304
break ;
305
- case CG_PRCKST_64 : /* ƒÓT0 -> fc/64 */
305
+ case CG_PRCKST_64 : /* phiT0 -> fc/64 */
306
306
result /= CG_PRCK_64_DIV ;
307
307
break ;
308
- case CG_PRCKST_128 : /* ƒÓT0 -> fc/128 */
308
+ case CG_PRCKST_128 : /* phiT0 -> fc/128 */
309
309
result /= CG_PRCK_128_DIV ;
310
310
break ;
311
- case CG_PRCKST_256 : /* ƒÓT0 -> fc/256 */
311
+ case CG_PRCKST_256 : /* phiT0 -> fc/256 */
312
312
result /= CG_PRCK_256_DIV ;
313
313
break ;
314
- case CG_PRCKST_512 : /* ƒÓT0 -> fc/512 */
314
+ case CG_PRCKST_512 : /* phiT0 -> fc/512 */
315
315
result /= CG_PRCK_512_DIV ;
316
316
break ;
317
317
default :
@@ -369,34 +369,34 @@ uint32_t cg_get_mphyt0(cg_t *p_obj)
369
369
break ;
370
370
}
371
371
switch (p_obj -> p_instance -> SYSCR & CG_PRCKST_MASK ) {
372
- case CG_PRCKST_1 : /* ƒÓT0 -> fc */
372
+ case CG_PRCKST_1 : /* phiT0 -> fc */
373
373
result /= CG_PRCK_1_DIV ;
374
374
break ;
375
- case CG_PRCKST_2 : /* ƒÓT0 -> fc/2 */
375
+ case CG_PRCKST_2 : /* phiT0 -> fc/2 */
376
376
result /= CG_PRCK_2_DIV ;
377
377
break ;
378
- case CG_PRCKST_4 : /* ƒÓT0 -> fc/4 */
378
+ case CG_PRCKST_4 : /* phiT0 -> fc/4 */
379
379
result /= CG_PRCK_4_DIV ;
380
380
break ;
381
- case CG_PRCKST_8 : /* ƒÓT0 -> fc/8 */
381
+ case CG_PRCKST_8 : /* phiT0 -> fc/8 */
382
382
result /= CG_PRCK_8_DIV ;
383
383
break ;
384
- case CG_PRCKST_16 : /* ƒÓT0 -> fc/16 */
384
+ case CG_PRCKST_16 : /* phiT0 -> fc/16 */
385
385
result /= CG_PRCK_16_DIV ;
386
386
break ;
387
- case CG_PRCKST_32 : /* ƒÓT0 -> fc/32 */
387
+ case CG_PRCKST_32 : /* phiT0 -> fc/32 */
388
388
result /= CG_PRCK_32_DIV ;
389
389
break ;
390
- case CG_PRCKST_64 : /* ƒÓT0 -> fc/64 */
390
+ case CG_PRCKST_64 : /* phiT0 -> fc/64 */
391
391
result /= CG_PRCK_64_DIV ;
392
392
break ;
393
- case CG_PRCKST_128 : /* ƒÓT0 -> fc/128 */
393
+ case CG_PRCKST_128 : /* phiT0 -> fc/128 */
394
394
result /= CG_PRCK_128_DIV ;
395
395
break ;
396
- case CG_PRCKST_256 : /* ƒÓT0 -> fc/256 */
396
+ case CG_PRCKST_256 : /* phiT0 -> fc/256 */
397
397
result /= CG_PRCK_256_DIV ;
398
398
break ;
399
- case CG_PRCKST_512 : /* ƒÓT0 -> fc/512 */
399
+ case CG_PRCKST_512 : /* phiT0 -> fc/512 */
400
400
result /= CG_PRCK_512_DIV ;
401
401
break ;
402
402
default :
@@ -405,13 +405,13 @@ uint32_t cg_get_mphyt0(cg_t *p_obj)
405
405
}
406
406
407
407
switch (p_obj -> p_instance -> SYSCR & CG_MCKSELPST_MASK ) {
408
- case CG_MCKSELPST_1 : /* ƒÓT0 -> fc/PRCK */
408
+ case CG_MCKSELPST_1 : /* phiT0 -> fc/PRCK */
409
409
result /= CG_FSYSM_1_DIV ;
410
410
break ;
411
- case CG_MCKSELPST_2 : /* ƒÓT0 -> fc/PRCK/2 */
411
+ case CG_MCKSELPST_2 : /* phiT0 -> fc/PRCK/2 */
412
412
result /= CG_FSYSM_2_DIV ;
413
413
break ;
414
- case CG_MCKSELPST_4 : /* ƒÓT0 -> fc/PRCK/4 */
414
+ case CG_MCKSELPST_4 : /* phiT0 -> fc/PRCK/4 */
415
415
result /= CG_FSYSM_4_DIV ;
416
416
break ;
417
417
default :
0 commit comments