Merge pull request #14134 from hugueskamba/hk_heap_size_fix_gigadevice

0xc0170 · web-flow · commit c79ccf1fb786 · 2021-01-11T11:47:58.000Z
GigaDevice: Fix heap size formula in scatter files
diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct
@@ -33,6 +33,8 @@
 
 #define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)
 
+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
+
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
 
   ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {  ; load address = execution address
@@ -41,11 +43,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RO)
   }
 
-  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
+  RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct
@@ -33,6 +33,8 @@
 
 #define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)
 
+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
+
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
 
   ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {  ; load address = execution address
@@ -41,11 +43,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RO)
   }
 
-  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
+  RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack

Original file line number	Diff line number	Diff line change
`@@ -33,6 +33,8 @@`
`33`	`33`
`34`	`34`	`#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)`
`35`	`35`
	`36`	`+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)`
	`37`	`+`
`36`	`38`	`LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`37`	`39`
`38`	`40`	`ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address`
`@@ -41,11 +43,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`41`	`43`	`.ANY (+RO)`
`42`	`44`	`}`
`43`	`45`
`44`		`- RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
	`46`	`+ RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
`45`	`47`	`.ANY (+RW +ZI)`
`46`	`48`	`}`
`47`	`49`
`48`		`- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`50`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`49`	`51`	`}`
`50`	`52`
`51`	`53`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack`