CMSIS: Modify M0/M0+ GCC asm to support ARMC6

Author: wernerlewis

cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_GCC/TARGET_M0/irq_cm0.S

@@ -102,7 +102,7 @@ SVC_ContextRestore:
         SUBS     R0,R0,#32              // Adjust address
         LDMIA    R0!,{R4-R7}            // Restore R4..R7
 
-        MOVS     R0,#~0xFFFFFFFD
+        MOVS     R0,#2                  // Binary complement of 0xFFFFFFFD
         MVNS     R0,R0                  // Set EXC_RETURN value
         BX       R0                     // Exit from handler
 

cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_GCC/TARGET_M0P/irq_cm0.S

@@ -102,7 +102,7 @@ SVC_ContextRestore:
         SUBS     R0,R0,#32              // Adjust address
         LDMIA    R0!,{R4-R7}            // Restore R4..R7
 
-        MOVS     R0,#~0xFFFFFFFD
+        MOVS     R0,#2                  // Binary complement of 0xFFFFFFFD
         MVNS     R0,R0                  // Set EXC_RETURN value
         BX       R0                     // Exit from handler