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STM32H7: system power supply configuration
1 parent d2adc9e commit cc90ec9

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7 files changed

+39
-25
lines changed

7 files changed

+39
-25
lines changed

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
8989
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
9090
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
9191

92-
/* Supply configuration update enable */
93-
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
9492
/* Configure the main internal regulator output voltage */
9593
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
9694

@@ -160,8 +158,6 @@ uint8_t SetSysClock_PLL_HSI(void)
160158
RCC_ClkInitTypeDef RCC_ClkInitStruct;
161159
RCC_OscInitTypeDef RCC_OscInitStruct;
162160

163-
/*!< Supply configuration update enable */
164-
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
165161
/* Configure the main internal regulator output voltage */
166162
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
167163
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
8989
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
9090
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
9191

92-
/* Supply configuration update enable */
93-
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
9492
/* Configure the main internal regulator output voltage */
9593
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
9694

@@ -163,8 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void)
163161
RCC_ClkInitTypeDef RCC_ClkInitStruct;
164162
RCC_OscInitTypeDef RCC_OscInitStruct;
165163

166-
/*!< Supply configuration update enable */
167-
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
168164
/* Configure the main internal regulator output voltage */
169165
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
170166
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/system_clock.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
8888
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8989
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
9090

91-
/* Supply configuration update enable */
92-
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
9391
/* Configure the main internal regulator output voltage */
9492
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
9593

@@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
165163
RCC_ClkInitTypeDef RCC_ClkInitStruct;
166164
RCC_OscInitTypeDef RCC_OscInitStruct;
167165

168-
/* Supply configuration update enable */
169-
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
170166
/* Configure the main internal regulator output voltage */
171167
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
172168

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/system_clock.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
8888
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8989
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
9090

91-
/* Supply configuration update enable */
92-
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
9391
/* Configure the main internal regulator output voltage */
9492
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
9593

@@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
165163
RCC_ClkInitTypeDef RCC_ClkInitStruct;
166164
RCC_OscInitTypeDef RCC_OscInitStruct;
167165

168-
/* Supply configuration update enable */
169-
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
170166
/* Configure the main internal regulator output voltage */
171167
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
172168

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/system_clock.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -84,9 +84,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
8484
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8585
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
8686

87-
/* Supply configuration update enable */
88-
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
89-
9087
/* Configure the main internal regulator output voltage */
9188
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
9289

@@ -156,8 +153,6 @@ uint8_t SetSysClock_PLL_HSI(void)
156153
RCC_ClkInitTypeDef RCC_ClkInitStruct;
157154
RCC_OscInitTypeDef RCC_OscInitStruct;
158155

159-
/*!< Supply configuration update enable */
160-
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
161156
/* Configure the main internal regulator output voltage */
162157
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
163158
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

targets/TARGET_STM/mbed_overrides.c

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,15 @@ void mbed_sdk_init()
174174
LSEDriveConfig();
175175
}
176176
#endif
177+
178+
#if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
179+
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
180+
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
181+
#else
182+
#error system_power_supply not configured
183+
#endif
184+
#endif
185+
177186
SetSysClock();
178187
SystemCoreClockUpdate();
179188

@@ -202,6 +211,14 @@ void mbed_sdk_init()
202211
}
203212
#endif
204213

214+
#if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
215+
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
216+
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
217+
#else
218+
#error system_power_supply not configured
219+
#endif
220+
#endif
221+
205222
SetSysClock();
206223
SystemCoreClockUpdate();
207224
#endif /* DUAL_CORE */

targets/targets.json

Lines changed: 22 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2722,6 +2722,12 @@
27222722
"lse_drive_load_level": {
27232723
"help": "HSE drive load level RCC_LSEDRIVE_LOW | RCC_LSEDRIVE_MEDIUMLOW | RCC_LSEDRIVE_MEDIUMHIGH | RCC_LSEDRIVE_HIGH",
27242724
"value": "RCC_LSEDRIVE_LOW"
2725+
},
2726+
"system_power_supply": {
2727+
"expected_value1": "PWR_LDO_SUPPLY | PWR_DIRECT_SMPS_SUPPLY",
2728+
"expected_value2": "PWR_SMPS_1V8_SUPPLIES_LDO | PWR_SMPS_2V5_SUPPLIES_LDO | PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO | PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO",
2729+
"expected_value3": "PWR_SMPS_1V8_SUPPLIES_EXT | PWR_SMPS_2V5_SUPPLIES_EXT | PWR_EXTERNAL_SOURCE_SUPPLY",
2730+
"value": "NC"
27252731
}
27262732
},
27272733
"components_add": [
@@ -2758,7 +2764,10 @@
27582764
],
27592765
"macros_add": [
27602766
"STM32H743xx"
2761-
]
2767+
],
2768+
"overrides": {
2769+
"system_power_supply": "PWR_LDO_SUPPLY"
2770+
}
27622771
},
27632772
"NUCLEO_H743ZI2": {
27642773
"inherits": [
@@ -2800,7 +2809,10 @@
28002809
],
28012810
"macros_add": [
28022811
"STM32H745xx"
2803-
]
2812+
],
2813+
"overrides": {
2814+
"system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
2815+
}
28042816
},
28052817
"MCU_STM32H745xI_CM4": {
28062818
"inherits": [
@@ -2846,7 +2858,10 @@
28462858
],
28472859
"macros_add": [
28482860
"STM32H747xx"
2849-
]
2861+
],
2862+
"overrides": {
2863+
"system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
2864+
}
28502865
},
28512866
"MCU_STM32H747xI_CM7": {
28522867
"inherits": [
@@ -2948,7 +2963,10 @@
29482963
],
29492964
"macros_add": [
29502965
"STM32H7A3xxQ"
2951-
]
2966+
],
2967+
"overrides": {
2968+
"system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
2969+
}
29522970
},
29532971
"NUCLEO_H7A3ZI_Q": {
29542972
"inherits": [

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