QSPI: add STM32L4 support

Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.

Author: 0xc0170

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h

@@ -83,6 +83,10 @@ typedef enum {
     CAN_1 = (int)CAN1_BASE
 } CANName;
 
+typedef enum {
+    QSPI_1 = (int)QSPI_R_BASE,
+} QSPIName;
+
 #ifdef __cplusplus
 }
 #endif

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c

@@ -340,3 +340,27 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {
     {PD_1,       CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to PMOD_SPI2_SCK
     {NC, NC, 0}
 };
+
+MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
+    {PE_12,  QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PE_13,  QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PE_14, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PE_15,  QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PA_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PB_0, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PB_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {NC,    NC,    0}
+};
+
+MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
+    {PE_10,  QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {NC,    NC,    0}
+};
+
+MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
+    {PE_11,  QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)},
+    {NC,    NC,    0}
+};

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h

@@ -58,6 +58,10 @@ struct trng_s {
     RNG_HandleTypeDef handle;
 };
 
+struct qspi_s {
+    QSPI_HandleTypeDef handle;
+};
+
 #include "common_objects.h"
 
 #ifdef __cplusplus

targets/TARGET_STM/qspi_api.c

@@ -142,8 +142,10 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
     obj->handle.Init.FlashSize = POSITION_VAL(QSPI_FLASH_SIZE_DEFAULT) - 1;
     obj->handle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE;
     obj->handle.Init.ClockMode = QSPI_CLOCK_MODE_0;
+#ifdef QSPI_DUALFLASH_ENABLE
     obj->handle.Init.FlashID = QSPI_FLASH_ID_1;
     obj->handle.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
+#endif
 
     obj->handle.Init.ClockMode = mode == 0 ? QSPI_CLOCK_MODE_0 : QSPI_CLOCK_MODE_3;
 

targets/targets.json

@@ -2145,7 +2145,7 @@
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0764"],
         "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
-        "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
+        "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH", "QSPI"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L475VG",
         "bootloader_supported": true