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Matthew MacovskyKyle Kearney
Matthew Macovsky
authored and
Kyle Kearney
committed
Streamline setting of instruction member variables
1 parent 4f01392 commit d330dee

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2 files changed

+39
-50
lines changed

2 files changed

+39
-50
lines changed

‎components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.cpp

Lines changed: 37 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -97,32 +97,21 @@ using namespace mbed;
9797

9898
#define IS_MEM_READY_MAX_RETRIES 10000
9999

100-
enum qspif_default_instructions {
101-
QSPIF_NOP = 0x00, // No operation
102-
QSPIF_PP = 0x02, // Page Program data
103-
QSPIF_READ = 0x03, // Read data
104-
QSPIF_SE = 0x20, // 4KB Sector Erase
105-
QSPIF_SFDP = 0x5a, // Read SFDP
106-
QSPIF_WRSR = 0x01, // Write Status/Configuration Register
107-
QSPIF_WRDI = 0x04, // Write Disable
108-
QSPIF_RDSR = 0x05, // Read Status Register
109-
QSPIF_WREN = 0x06, // Write Enable
110-
QSPIF_RSTEN = 0x66, // Reset Enable
111-
QSPIF_RST = 0x99, // Reset
112-
QSPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
113-
QSPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register
114-
};
115100

116101
// General QSPI instructions
117102
#define QSPIF_INST_WSR1 0x01 // Write status register 1
103+
#define QSPIF_INST_PROG 0x02 // Page program
104+
#define QSPIF_INST_WRDI 0x04 // Write disable
118105
#define QSPIF_INST_RSR1 0x05 // Read status register 1
106+
#define QSPIF_INST_WREN 0x06 // Write enable
119107
#define QSPIF_INST_RSFDP 0x5A // Read SFDP
120108
#define QSPIF_INST_RDID 0x9F // Read Manufacturer and JDEC Device ID
121109

122110
// Device-specific instructions
123111
#define QSPIF_INST_ULBPR 0x98 // Clear all write-protection bits in the Block-Protection register
124112

125-
// Default legacy erase instruction
113+
// Default read/legacy erase instructions
114+
#define QSPIF_INST_READ_DEFAULT 0x03
126115
#define QSPIF_INST_LEGACY_ERASE_DEFAULT QSPI_NO_INST
127116

128117
// Default status register 2 read/write instructions
@@ -163,7 +152,21 @@ QSPIFBlockDevice::QSPIFBlockDevice(PinName io0, PinName io1, PinName io2, PinNam
163152
tr_error("Too many different QSPIFBlockDevice devices - max allowed: %d", QSPIF_MAX_ACTIVE_FLASH_DEVICES);
164153
}
165154

166-
// Set default erase instructions
155+
// Initialize parameters
156+
_min_common_erase_size = 0;
157+
_regions_count = 1;
158+
_region_erase_types_bitfield[0] = ERASE_BITMASK_NONE;
159+
160+
// Default Bus Setup 1_1_1 with 0 dummy and mode cycles
161+
_inst_width = QSPI_CFG_BUS_SINGLE;
162+
_address_width = QSPI_CFG_BUS_SINGLE;
163+
_address_size = QSPI_CFG_ADDR_SIZE_24;
164+
_alt_size = 0;
165+
_dummy_cycles = 0;
166+
_data_width = QSPI_CFG_BUS_SINGLE;
167+
168+
// Set default read/erase instructions
169+
_read_instruction = QSPIF_INST_READ_DEFAULT;
167170
_legacy_erase_instruction = QSPIF_INST_LEGACY_ERASE_DEFAULT;
168171

169172
// Set default status register 2 write/read instructions
@@ -212,18 +215,8 @@ int QSPIFBlockDevice::init()
212215
goto exit_point;
213216
}
214217

215-
//Initialize parameters
216-
_min_common_erase_size = 0;
217-
_regions_count = 1;
218-
_region_erase_types_bitfield[0] = ERASE_BITMASK_NONE;
219-
220-
//Default Bus Setup 1_1_1 with 0 dummy and mode cycles
221-
_inst_width = QSPI_CFG_BUS_SINGLE;
222-
_address_width = QSPI_CFG_BUS_SINGLE;
223-
_address_size = QSPI_CFG_ADDR_SIZE_24;
224218
_alt_size = 0;
225219
_dummy_cycles = 0;
226-
_data_width = QSPI_CFG_BUS_SINGLE;
227220
if (QSPI_STATUS_OK != _qspi_set_frequency(_freq)) {
228221
tr_error("QSPI Set Frequency Failed");
229222
status = QSPIF_BD_ERROR_DEVICE_ERROR;
@@ -300,7 +293,7 @@ int QSPIFBlockDevice::deinit()
300293
}
301294

302295
// Disable Device for Writing
303-
qspi_status_t status = _qspi_send_general_command(QSPIF_WRDI, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
296+
qspi_status_t status = _qspi_send_general_command(QSPIF_INST_WRDI, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
304297
if (status != QSPI_STATUS_OK) {
305298
tr_error("Write Disable failed");
306299
result = QSPIF_BD_ERROR_DEVICE_ERROR;
@@ -362,7 +355,7 @@ int QSPIFBlockDevice::program(const void *buffer, bd_addr_t addr, bd_size_t size
362355
goto exit_point;
363356
}
364357

365-
result = _qspi_send_program_command(_prog_instruction, buffer, addr, &written_bytes);
358+
result = _qspi_send_program_command(QSPIF_INST_PROG, buffer, addr, &written_bytes);
366359
if ((result != QSPI_STATUS_OK) || (chunk != written_bytes)) {
367360
tr_error("Write failed");
368361
program_failed = true;
@@ -708,9 +701,6 @@ int QSPIFBlockDevice::_sfdp_parse_basic_param_table(uint32_t basic_table_addr, s
708701
param_table[4]);
709702
_device_size_bytes = (density_bits + 1) / 8;
710703

711-
// Set Default read/program Instructions
712-
_read_instruction = QSPIF_READ;
713-
_prog_instruction = QSPIF_PP;
714704
// Set Page Size (QSPI write must be done on Page limits)
715705
_page_size_bytes = _sfdp_detect_page_size(param_table, basic_table_size);
716706

@@ -729,7 +719,7 @@ int QSPIFBlockDevice::_sfdp_parse_basic_param_table(uint32_t basic_table_addr, s
729719
}
730720

731721
// Detect and Set fastest Bus mode (default 1-1-1)
732-
_sfdp_detect_best_bus_read_mode(param_table, basic_table_size, shouldSetQuadEnable, is_qpi_mode, _read_instruction);
722+
_sfdp_detect_best_bus_read_mode(param_table, basic_table_size, shouldSetQuadEnable, is_qpi_mode);
733723
if (true == shouldSetQuadEnable) {
734724
// Set Quad Enable and QPI Bus modes if Supported
735725
tr_debug("Init - Setting Quad Enable");
@@ -929,8 +919,7 @@ int QSPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_para
929919
}
930920

931921
int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size,
932-
bool &set_quad_enable,
933-
bool &is_qpi_mode, qspi_inst_t &read_inst)
922+
bool &set_quad_enable, bool &is_qpi_mode)
934923
{
935924
set_quad_enable = false;
936925
is_qpi_mode = false;
@@ -943,14 +932,13 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
943932

944933
if (examined_byte & 0x10) {
945934
// QPI 4-4-4 Supported
946-
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE];
935+
_read_instruction = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE];
947936
set_quad_enable = true;
948937
is_qpi_mode = true;
949938
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1] & 0x1F;
950939
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1] >> 5;
951940
_alt_size = mode_cycles * 4;
952941
tr_debug("Read Bus Mode set to 4-4-4, Instruction: 0x%xh", _read_instruction);
953-
//_inst_width = QSPI_CFG_BUS_QUAD;
954942
_address_width = QSPI_CFG_BUS_QUAD;
955943
_data_width = QSPI_CFG_BUS_QUAD;
956944
}
@@ -959,7 +947,7 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
959947
examined_byte = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_FAST_READ_SUPPORT_BYTE];
960948
if (examined_byte & 0x20) {
961949
// Fast Read 1-4-4 Supported
962-
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE];
950+
_read_instruction = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE];
963951
set_quad_enable = true;
964952
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1] & 0x1F;
965953
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1] >> 5;
@@ -972,7 +960,7 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
972960

973961
if (examined_byte & 0x40) {
974962
// Fast Read 1-1-4 Supported
975-
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE];
963+
_read_instruction = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE];
976964
set_quad_enable = true;
977965
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1] & 0x1F;
978966
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1] >> 5;
@@ -984,7 +972,7 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
984972
examined_byte = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_QPI_READ_SUPPORT_BYTE];
985973
if (examined_byte & 0x01) {
986974
// Fast Read 2-2-2 Supported
987-
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE];
975+
_read_instruction = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE];
988976
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1] & 0x1F;
989977
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1] >> 5;
990978
_alt_size = mode_cycles * 2;
@@ -997,7 +985,7 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
997985
examined_byte = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_FAST_READ_SUPPORT_BYTE];
998986
if (examined_byte & 0x10) {
999987
// Fast Read 1-2-2 Supported
1000-
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE];
988+
_read_instruction = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE];
1001989
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1] & 0x1F;
1002990
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1] >> 5;
1003991
_alt_size = mode_cycles * 2;
@@ -1008,14 +996,15 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
1008996
}
1009997
if (examined_byte & 0x01) {
1010998
// Fast Read 1-1-2 Supported
1011-
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE];
999+
_read_instruction = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE];
10121000
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1] & 0x1F;
10131001
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1] >> 5;
10141002
_alt_size = mode_cycles;
10151003
_data_width = QSPI_CFG_BUS_DUAL;
10161004
tr_debug("Read Bus Mode set to 1-1-2, Instruction: 0x%xh", _read_instruction);
10171005
break;
10181006
}
1007+
_read_instruction = QSPIF_INST_READ_DEFAULT;
10191008
tr_debug("Read Bus Mode set to 1-1-1, Instruction: 0x%xh", _read_instruction);
10201009
} while (false);
10211010

@@ -1258,7 +1247,7 @@ int QSPIFBlockDevice::_set_write_enable()
12581247
int status = -1;
12591248

12601249
do {
1261-
if (QSPI_STATUS_OK != _qspi_send_general_command(QSPIF_WREN, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0)) {
1250+
if (QSPI_STATUS_OK != _qspi_send_general_command(QSPIF_INST_WREN, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0)) {
12621251
tr_error("Sending WREN command FAILED");
12631252
break;
12641253
}
@@ -1295,10 +1284,11 @@ bool QSPIFBlockDevice::_is_mem_ready()
12951284

12961285
do {
12971286
rtos::ThisThread::sleep_for(1);
1298-
retries- //Read the Status Register from device
1299-
memset(status_value, 0xFF, QSPI_MAX_STATUS_REGISTER_SIZE);
1300-
if (QSPI_STATUS_OK != _qspi_send_general_command(QSPIF_INST_RSR1, QSPI_NO_ADDRESS_COMMAND, NULL, 0, (char *) &status_value,
1301-
1)) { // store received values in status_value
1287+
retries++;
1288+
//Read Status Register 1 from device
1289+
if (QSPI_STATUS_OK != _qspi_send_general_command(QSPIF_INST_RSR1, QSPI_NO_ADDRESS_COMMAND,
1290+
NULL, 0,
1291+
(char *) &status_value, 1)) { // store received value in status_value
13021292
tr_error("Reading Status Register failed");
13031293
}
13041294
} while ((status_value & QSPIF_STATUS_BIT_WIP) != 0 && retries < IS_MEM_READY_MAX_RETRIES);

‎components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -292,8 +292,8 @@ class QSPIFBlockDevice : public mbed::BlockDevice {
292292
int _sfdp_detect_reset_protocol_and_reset(uint8_t *basic_param_table_ptr);
293293

294294
// Detect fastest read Bus mode supported by device
295-
int _sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size, bool &set_quad_enable,
296-
bool &is_qpi_mode, mbed::qspi_inst_t &read_inst);
295+
int _sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size,
296+
bool &set_quad_enable, bool &is_qpi_mode);
297297

298298
// Enable Quad mode if supported (1-1-4, 1-4-4, 4-4-4 bus modes)
299299
int _sfdp_set_quad_enabled(uint8_t *basic_param_table_ptr);
@@ -340,7 +340,6 @@ class QSPIFBlockDevice : public mbed::BlockDevice {
340340

341341
// Command Instructions
342342
mbed::qspi_inst_t _read_instruction;
343-
mbed::qspi_inst_t _prog_instruction;
344343
mbed::qspi_inst_t _legacy_erase_instruction;
345344

346345
// Status register write/read instructions

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