Apply MAX32660 delta

Update mbed hal function as per of SDK update

Signed-off-by: Sadik.Ozer <[email protected]>

Author: ozersa

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/dma_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -99,7 +97,7 @@ typedef struct {
 typedef struct {
     __IO uint32_t int_en;               /**< <tt>\b 0x000:</tt> DMA INT_EN Register */
     __I  uint32_t int_fl;               /**< <tt>\b 0x004:</tt> DMA INT_FL Register */
-    __R  uint32_t rsv_0x8_0xff[62];
+    __I  uint32_t rsv_0x8_0xff[62];
     __IO mxc_dma_ch_regs_t    ch[4];    /**< <tt>\b 0x100:</tt> DMA CH Register */
 } mxc_dma_regs_t;
 

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/fcr_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/flc_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -89,9 +87,9 @@ typedef struct {
     __IO uint32_t addr;                 /**< <tt>\b 0x00:</tt> FLC ADDR Register */
     __IO uint32_t clkdiv;               /**< <tt>\b 0x04:</tt> FLC CLKDIV Register */
     __IO uint32_t ctrl;                 /**< <tt>\b 0x08:</tt> FLC CTRL Register */
-    __R  uint32_t rsv_0xc_0x23[6];
+    __I  uint32_t rsv_0xc_0x23[6];
     __IO uint32_t intr;                 /**< <tt>\b 0x024:</tt> FLC INTR Register */
-    __R  uint32_t rsv_0x28_0x2f[2];
+    __I  uint32_t rsv_0x28_0x2f[2];
     __IO uint32_t data[4];              /**< <tt>\b 0x30:</tt> FLC DATA Register */
     __O  uint32_t actrl;                /**< <tt>\b 0x40:</tt> FLC ACTRL Register */
 } mxc_flc_regs_t;

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/gcr_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -90,11 +88,11 @@ typedef struct {
     __IO uint32_t rst0;                 /**< <tt>\b 0x04:</tt> GCR RST0 Register */
     __IO uint32_t clk_ctrl;             /**< <tt>\b 0x08:</tt> GCR CLK_CTRL Register */
     __IO uint32_t pm;                   /**< <tt>\b 0x0C:</tt> GCR PM Register */
-    __R  uint32_t rsv_0x10_0x23[5];
+    __I  uint32_t rsv_0x10_0x23[5];
     __IO uint32_t pclk_dis0;            /**< <tt>\b 0x24:</tt> GCR PCLK_DIS0 Register */
     __IO uint32_t mem_ctrl;             /**< <tt>\b 0x28:</tt> GCR MEM_CTRL Register */
     __IO uint32_t mem_zctrl;            /**< <tt>\b 0x2C:</tt> GCR MEM_ZCTRL Register */
-    __R  uint32_t rsv_0x30_0x3f[4];
+    __I  uint32_t rsv_0x30_0x3f[4];
     __IO uint32_t sys_stat;             /**< <tt>\b 0x40:</tt> GCR SYS_STAT Register */
     __IO uint32_t rst1;                 /**< <tt>\b 0x44:</tt> GCR RST1 Register */
     __IO uint32_t pclk_dis1;            /**< <tt>\b 0x48:</tt> GCR PCLK_DIS1 Register */

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/gpio_regs.h

@@ -67,9 +67,6 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
 /// @endcond
 
 /* **** Definitions **** */
@@ -102,13 +99,13 @@ typedef struct {
     __IO uint32_t int_en;               /**< <tt>\b 0x34:</tt> GPIO INT_EN Register */
     __IO uint32_t int_en_set;           /**< <tt>\b 0x38:</tt> GPIO INT_EN_SET Register */
     __IO uint32_t int_en_clr;           /**< <tt>\b 0x3C:</tt> GPIO INT_EN_CLR Register */
-    __I  uint32_t int_stat;             /**< <tt>\b 0x40:</tt> GPIO INT_STAT Register */
-    __R  uint32_t rsv_0x44;
+    __IO uint32_t int_stat;             /**< <tt>\b 0x40:</tt> GPIO INT_STAT Register */
+    __I  uint32_t rsv_0x44;
     __IO uint32_t int_clr;              /**< <tt>\b 0x48:</tt> GPIO INT_CLR Register */
     __IO uint32_t wake_en;              /**< <tt>\b 0x4C:</tt> GPIO WAKE_EN Register */
     __IO uint32_t wake_en_set;          /**< <tt>\b 0x50:</tt> GPIO WAKE_EN_SET Register */
     __IO uint32_t wake_en_clr;          /**< <tt>\b 0x54:</tt> GPIO WAKE_EN_CLR Register */
-    __R  uint32_t rsv_0x58;
+    __I  uint32_t rsv_0x58;
     __IO uint32_t int_dual_edge;        /**< <tt>\b 0x5C:</tt> GPIO INT_DUAL_EDGE Register */
     __IO uint32_t pad_cfg1;             /**< <tt>\b 0x60:</tt> GPIO PAD_CFG1 Register */
     __IO uint32_t pad_cfg2;             /**< <tt>\b 0x64:</tt> GPIO PAD_CFG2 Register */
@@ -118,13 +115,13 @@ typedef struct {
     __IO uint32_t en2;                  /**< <tt>\b 0x74:</tt> GPIO EN2 Register */
     __IO uint32_t en2_set;              /**< <tt>\b 0x78:</tt> GPIO EN2_SET Register */
     __IO uint32_t en2_clr;              /**< <tt>\b 0x7C:</tt> GPIO EN2_CLR Register */
-    __R  uint32_t rsv_0x80_0xa7[10];
+    __I  uint32_t rsv_0x80_0xa7[10];
     __IO uint32_t is;                   /**< <tt>\b 0xA8:</tt> GPIO IS Register */
     __IO uint32_t sr;                   /**< <tt>\b 0xAC:</tt> GPIO SR Register */
     __IO uint32_t ds0;                  /**< <tt>\b 0xB0:</tt> GPIO DS0 Register */
     __IO uint32_t ds1;                  /**< <tt>\b 0xB4:</tt> GPIO DS1 Register */
     __IO uint32_t ps;                   /**< <tt>\b 0xB8:</tt> GPIO PS Register */
-    __R  uint32_t rsv_0xbc;
+    __I  uint32_t rsv_0xbc;
     __IO uint32_t vssel;                /**< <tt>\b 0xC0:</tt> GPIO VSSEL Register */
 } mxc_gpio_regs_t;
 

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/i2c_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/icc_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -88,9 +86,9 @@ extern "C" {
 typedef struct {
     __I  uint32_t cache_id;             /**< <tt>\b 0x0000:</tt> ICC CACHE_ID Register */
     __I  uint32_t mem_size;             /**< <tt>\b 0x0004:</tt> ICC MEM_SIZE Register */
-    __R  uint32_t rsv_0x8_0xff[62];
+    __I  uint32_t rsv_0x8_0xff[62];
     __IO uint32_t cache_ctrl;           /**< <tt>\b 0x0100:</tt> ICC CACHE_CTRL Register */
-    __R  uint32_t rsv_0x104_0x6ff[383];
+    __I  uint32_t rsv_0x104_0x6ff[383];
     __IO uint32_t invalidate;           /**< <tt>\b 0x0700:</tt> ICC INVALIDATE Register */
 } mxc_icc_regs_t;
 

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/pwrseq_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -89,7 +87,7 @@ typedef struct {
     __IO uint32_t lp_ctrl;              /**< <tt>\b 0x00:</tt> PWRSEQ LP_CTRL Register */
     __IO uint32_t lp_wakefl;            /**< <tt>\b 0x04:</tt> PWRSEQ LP_WAKEFL Register */
     __IO uint32_t lpwk_en;              /**< <tt>\b 0x08:</tt> PWRSEQ LPWK_EN Register */
-    __R  uint32_t rsv_0xc_0x3f[13];
+    __I  uint32_t rsv_0xc_0x3f[13];
     __IO uint32_t lpmemsd;              /**< <tt>\b 0x40:</tt> PWRSEQ LPMEMSD Register */
 } mxc_pwrseq_regs_t;
 

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/spi_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -92,7 +90,7 @@ typedef struct {
     __IO uint32_t ctrl2;                /**< <tt>\b 0x0C:</tt> SPI CTRL2 Register */
     __IO uint32_t ss_time;              /**< <tt>\b 0x10:</tt> SPI SS_TIME Register */
     __IO uint32_t clk_cfg;              /**< <tt>\b 0x14:</tt> SPI CLK_CFG Register */
-    __R  uint32_t rsv_0x18;
+    __I  uint32_t rsv_0x18;
     __IO uint32_t dma;                  /**< <tt>\b 0x1C:</tt> SPI DMA Register */
     __IO uint32_t int_fl;               /**< <tt>\b 0x20:</tt> SPI INT_FL Register */
     __IO uint32_t int_en;               /**< <tt>\b 0x24:</tt> SPI INT_EN Register */

targets/TARGET_Maxim/TARGET_MAX32660/Libraries/CMSIS/Device/Maxim/MAX32660/Include/spimss_regs.h

@@ -67,9 +67,7 @@ extern "C" {
 #ifndef __O
 #define __O  volatile
 #endif
-#ifndef __R
-#define __R  volatile const
-#endif
+
 /// @endcond
 
 /* **** Definitions **** */
@@ -87,11 +85,11 @@ extern "C" {
  */
 typedef struct {
     __IO uint16_t data;                 /**< <tt>\b 0x00:</tt> SPIMSS DATA Register */
-    __R  uint16_t rsv_0x2;
+    __I  uint16_t rsv_0x2;
     __IO uint32_t ctrl;                 /**< <tt>\b 0x04:</tt> SPIMSS CTRL Register */
     __IO uint32_t int_fl;               /**< <tt>\b 0x08:</tt> SPIMSS INT_FL Register */
     __IO uint32_t mode;                 /**< <tt>\b 0x0C:</tt> SPIMSS MODE Register */
-    __R  uint32_t rsv_0x10;
+    __I  uint32_t rsv_0x10;
     __IO uint32_t brg;                  /**< <tt>\b 0x14:</tt> SPIMSS BRG Register */
     __IO uint32_t dma;                  /**< <tt>\b 0x18:</tt> SPIMSS DMA Register */
     __IO uint32_t i2s_ctrl;             /**< <tt>\b 0x1C:</tt> SPIMSS I2S_CTRL Register */