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[LPC15XX] Fixed µs_ticker implementation for GCC
Modified SCT3 match register critical section for compatibility with GCC toolchain.
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hal/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -61,12 +61,11 @@ uint32_t us_ticker_read() {
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void us_ticker_set_interrupt(timestamp_t timestamp) {
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// Set SCT3 match register 0 (critical section)
64-
int wasMasked = __disable_irq();
64+
__disable_irq();
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LPC_SCT3->CTRL |= (1 << 2);
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LPC_SCT3->MATCH0 = (uint32_t)timestamp;
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LPC_SCT3->CTRL &= ~(1 << 2);
68-
if (!wasMasked)
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__enable_irq();
68+
__enable_irq();
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// Enable interrupt on SCT3 event 0
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LPC_SCT3->EVEN = (1 << 0);

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