STM32H7: Increase watchdog timeout value

Author: jeromecoutant

targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_iwdg.c

@@ -109,10 +109,8 @@
 /** @defgroup IWDG_Private_Defines IWDG Private Defines
   * @{
   */
-/* Status register need 5 RC LSI divided by prescaler clock to be updated. With
-   higher prescaler (256), and according to LSI variation, we need to wait at
-   least 6 cycles so 48 ms. */
-#define HAL_IWDG_DEFAULT_TIMEOUT            48u
+/* MBED */
+#define HAL_IWDG_DEFAULT_TIMEOUT            96u
 /**
   * @}
   */