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MCUXpresso: Update SPI driver
Move the clock setup and peripheral reset to the init function Signed-off-by: Mahesh Mahadevan <[email protected]>
1 parent 783c02d commit dd21e6d

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+51
-48
lines changed
  • targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC

1 file changed

+51
-48
lines changed

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/spi_api.c

Lines changed: 51 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@
2828

2929
/* Array of SPI peripheral base address. */
3030
static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
31+
static int baud_rate = 0;
3132

3233
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
3334
{
@@ -42,6 +43,53 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
4243
obj->instance = pinmap_merge(spi_data, spi_cntl);
4344
MBED_ASSERT((int)obj->instance != NC);
4445

46+
switch (obj->instance) {
47+
case 0:
48+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
49+
RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
50+
break;
51+
case 1:
52+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
53+
RESET_PeripheralReset(kFC1_RST_SHIFT_RSTn);
54+
break;
55+
case 2:
56+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
57+
RESET_PeripheralReset(kFC2_RST_SHIFT_RSTn);
58+
break;
59+
case 3:
60+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM3);
61+
RESET_PeripheralReset(kFC3_RST_SHIFT_RSTn);
62+
break;
63+
case 4:
64+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
65+
RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
66+
break;
67+
case 5:
68+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM5);
69+
RESET_PeripheralReset(kFC5_RST_SHIFT_RSTn);
70+
break;
71+
case 6:
72+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM6);
73+
RESET_PeripheralReset(kFC6_RST_SHIFT_RSTn);
74+
break;
75+
case 7:
76+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7);
77+
RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn);
78+
break;
79+
#if (FSL_FEATURE_SOC_SPI_COUNT > 8U)
80+
case 8:
81+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8);
82+
RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn);
83+
break;
84+
#endif
85+
#if (FSL_FEATURE_SOC_SPI_COUNT > 9U)
86+
case 9:
87+
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM9);
88+
RESET_PeripheralReset(kFC9_RST_SHIFT_RSTn);
89+
break;
90+
#endif
91+
}
92+
4593
// pin out the spi pins
4694
pinmap_pinout(mosi, PinMap_SPI_MOSI);
4795
pinmap_pinout(miso, PinMap_SPI_MISO);
@@ -80,61 +128,16 @@ void spi_format(spi_t *obj, int bits, int mode, int slave)
80128
master_config.polarity = (mode & 0x2) ? kSPI_ClockPolarityActiveLow : kSPI_ClockPolarityActiveHigh;
81129
master_config.phase = (mode & 0x1) ? kSPI_ClockPhaseSecondEdge : kSPI_ClockPhaseFirstEdge;
82130
master_config.direction = kSPI_MsbFirst;
83-
84-
switch (obj->instance) {
85-
case 0:
86-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
87-
RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
88-
break;
89-
case 1:
90-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
91-
RESET_PeripheralReset(kFC1_RST_SHIFT_RSTn);
92-
break;
93-
case 2:
94-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
95-
RESET_PeripheralReset(kFC2_RST_SHIFT_RSTn);
96-
break;
97-
case 3:
98-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM3);
99-
RESET_PeripheralReset(kFC3_RST_SHIFT_RSTn);
100-
break;
101-
case 4:
102-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
103-
RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
104-
break;
105-
case 5:
106-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM5);
107-
RESET_PeripheralReset(kFC5_RST_SHIFT_RSTn);
108-
break;
109-
case 6:
110-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM6);
111-
RESET_PeripheralReset(kFC6_RST_SHIFT_RSTn);
112-
break;
113-
case 7:
114-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7);
115-
RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn);
116-
break;
117-
#if (FSL_FEATURE_SOC_SPI_COUNT > 8U)
118-
case 8:
119-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8);
120-
RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn);
121-
break;
122-
#endif
123-
#if (FSL_FEATURE_SOC_SPI_COUNT > 9U)
124-
case 9:
125-
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM9);
126-
RESET_PeripheralReset(kFC9_RST_SHIFT_RSTn);
127-
break;
128-
#endif
129-
131+
if (baud_rate > 0) {
132+
master_config.baudRate_Bps = baud_rate;
130133
}
131-
132134
SPI_MasterInit(spi_address[obj->instance], &master_config, 12000000);
133135
}
134136
}
135137

136138
void spi_frequency(spi_t *obj, int hz)
137139
{
140+
baud_rate = hz;
138141
SPI_MasterSetBaud(spi_address[obj->instance], (uint32_t)hz, 12000000);
139142
}
140143

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