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Merge pull request #13600 from rajkan01/fpga_test_shield_refactor
Refactor COMPONENT_FPGA_CI_TEST_SHIELD directory structure
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.travis.yml

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rm -r cmsis/CMSIS_5/CMSIS/RTOS2 cmsis/device/rtos drivers/source/usb connectivity/cellular connectivity/drivers/cellular \
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connectivity/libraries/ppp connectivity/netsocket connectivity/nanostack connectivity/lwipstack features/frameworks/greentea-client \
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features/frameworks/utest features/frameworks/unity components BUILD
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features/frameworks/utest features/frameworks/unity BUILD
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- python tools/make.py -t GCC_ARM -m NUCLEO_F103RB --source=. --build=BUILD/NUCLEO_F103RB/GCC_ARM -j0
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# Run profiling tests
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- make -C ${EVENTS}/tests/unit prof | tee prof
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