@@ -58,22 +58,23 @@ static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
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#define NU_MAX_PORT (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
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- #ifdef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
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- #define NUC472_GPIO_IRQ_DEBOUNCE_ENABLE MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
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- #else
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- #define NUC472_GPIO_IRQ_DEBOUNCE_ENABLE 0
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+ #ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
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+ #define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE 0
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#endif
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- #ifdef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
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- #define NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
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- #else
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- #define NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_IRC10K
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+ #ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
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+ #define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
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+ #endif
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+ static PinName gpio_irq_debounce_arr [] = {
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+ MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
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+ };
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+
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+ #ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
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+ #define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_IRC10K
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#endif
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- #ifdef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
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- #define NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
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- #else
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- #define NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
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+ #ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
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+ #define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
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#endif
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int gpio_irq_init (gpio_irq_t * obj , PinName pin , gpio_irq_handler handler , uint32_t id )
@@ -95,13 +96,36 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
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GPIO_T * gpio_base = NU_PORT_BASE (port_index );
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//gpio_set(pin);
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- #if NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
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- // Configure de-bounce clock source and sampling cycle time
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- GPIO_SET_DEBOUNCE_TIME (NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE , NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE );
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- GPIO_ENABLE_DEBOUNCE (gpio_base , 1 << pin_index );
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+ {
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+ #if MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
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+ // Suppress compiler warning
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+ (void ) gpio_irq_debounce_arr ;
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+
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+ // Configure de-bounce clock source and sampling cycle time
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+ GPIO_SET_DEBOUNCE_TIME (MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE , MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE );
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+ GPIO_ENABLE_DEBOUNCE (gpio_base , 1 << pin_index );
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#else
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- GPIO_DISABLE_DEBOUNCE (gpio_base , 1 << pin_index );
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+ // Enable de-bounce if the pin is in the de-bounce enable list
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+
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+ // De-bounce defaults to disabled.
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+ GPIO_DISABLE_DEBOUNCE (gpio_base , 1 << pin_index );
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+
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+ PinName * debounce_pos = gpio_irq_debounce_arr ;
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+ PinName * debounce_end = gpio_irq_debounce_arr + sizeof (gpio_irq_debounce_arr ) / sizeof (gpio_irq_debounce_arr [0 ]);
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+ for (; debounce_pos != debounce_end && * debounce_pos != NC ; debounce_pos ++ ) {
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+ uint32_t pin_index_debunce = NU_PINNAME_TO_PIN (* debounce_pos );
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+ uint32_t port_index_debounce = NU_PINNAME_TO_PORT (* debounce_pos );
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+
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+ if (pin_index == pin_index_debunce &&
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+ port_index == port_index_debounce ) {
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+ // Configure de-bounce clock source and sampling cycle time
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+ GPIO_SET_DEBOUNCE_TIME (MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE , MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE );
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+ GPIO_ENABLE_DEBOUNCE (gpio_base , 1 << pin_index );
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+ break ;
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+ }
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+ }
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#endif
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+ }
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struct nu_gpio_irq_var * var = gpio_irq_var_arr + port_index ;
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