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[NUC472/M453] Support separate enable of GPIO IRQ de-bounce
1 parent 657d90d commit e0f97e5

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4 files changed

+90
-34
lines changed

4 files changed

+90
-34
lines changed

targets/TARGET_NUVOTON/TARGET_M451/gpio_irq_api.c

Lines changed: 41 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -52,22 +52,23 @@ static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
5252

5353
#define NU_MAX_PORT (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
5454

55-
#ifdef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE
56-
#define M451_GPIO_IRQ_DEBOUNCE_ENABLE MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE
57-
#else
58-
#define M451_GPIO_IRQ_DEBOUNCE_ENABLE 0
55+
#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE
56+
#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE 0
5957
#endif
6058

61-
#ifdef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
62-
#define M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
63-
#else
64-
#define M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_LIRC
59+
#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
60+
#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
61+
#endif
62+
static PinName gpio_irq_debounce_arr[] = {
63+
MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
64+
};
65+
66+
#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
67+
#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_LIRC
6568
#endif
6669

67-
#ifdef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
68-
#define M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
69-
#else
70-
#define M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
70+
#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
71+
#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
7172
#endif
7273

7374
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
@@ -89,13 +90,36 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
8990
GPIO_T *gpio_base = NU_PORT_BASE(port_index);
9091
//gpio_set(pin);
9192

92-
#if M451_GPIO_IRQ_DEBOUNCE_ENABLE
93-
// Configure de-bounce clock source and sampling cycle time
94-
GPIO_SET_DEBOUNCE_TIME(M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
95-
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
93+
{
94+
#if MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE
95+
// Suppress compiler warning
96+
(void) gpio_irq_debounce_arr;
97+
98+
// Configure de-bounce clock source and sampling cycle time
99+
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
100+
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
96101
#else
97-
GPIO_DISABLE_DEBOUNCE(gpio_base, 1 << pin_index);
102+
// Enable de-bounce if the pin is in the de-bounce enable list
103+
104+
// De-bounce defaults to disabled.
105+
GPIO_DISABLE_DEBOUNCE(gpio_base, 1 << pin_index);
106+
107+
PinName *debounce_pos = gpio_irq_debounce_arr;
108+
PinName *debounce_end = gpio_irq_debounce_arr + sizeof (gpio_irq_debounce_arr) / sizeof (gpio_irq_debounce_arr[0]);
109+
for (; debounce_pos != debounce_end && *debounce_pos != NC; debounce_pos ++) {
110+
uint32_t pin_index_debunce = NU_PINNAME_TO_PIN(*debounce_pos);
111+
uint32_t port_index_debounce = NU_PINNAME_TO_PORT(*debounce_pos);
112+
113+
if (pin_index == pin_index_debunce &&
114+
port_index == port_index_debounce) {
115+
// Configure de-bounce clock source and sampling cycle time
116+
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
117+
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
118+
break;
119+
}
120+
}
98121
#endif
122+
}
99123

100124
struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
101125

targets/TARGET_NUVOTON/TARGET_M451/mbed_lib.json

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,10 @@
55
"help": "Enable GPIO IRQ debounce",
66
"value": 0
77
},
8+
"gpio-irq-debounce-enable-list": {
9+
"help": "Comma separated pin list to enable GPIO IRQ debounce",
10+
"value": "NC"
11+
},
812
"gpio-irq-debounce-clock-source": {
913
"help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
1014
"value": "GPIO_DBCTL_DBCLKSRC_LIRC"

targets/TARGET_NUVOTON/TARGET_NUC472/gpio_irq_api.c

Lines changed: 41 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -58,22 +58,23 @@ static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
5858

5959
#define NU_MAX_PORT (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
6060

61-
#ifdef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
62-
#define NUC472_GPIO_IRQ_DEBOUNCE_ENABLE MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
63-
#else
64-
#define NUC472_GPIO_IRQ_DEBOUNCE_ENABLE 0
61+
#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
62+
#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE 0
6563
#endif
6664

67-
#ifdef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
68-
#define NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
69-
#else
70-
#define NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_IRC10K
65+
#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
66+
#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
67+
#endif
68+
static PinName gpio_irq_debounce_arr[] = {
69+
MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
70+
};
71+
72+
#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
73+
#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_IRC10K
7174
#endif
7275

73-
#ifdef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
74-
#define NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
75-
#else
76-
#define NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
76+
#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
77+
#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
7778
#endif
7879

7980
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
@@ -95,13 +96,36 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
9596
GPIO_T *gpio_base = NU_PORT_BASE(port_index);
9697
//gpio_set(pin);
9798

98-
#if NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
99-
// Configure de-bounce clock source and sampling cycle time
100-
GPIO_SET_DEBOUNCE_TIME(NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
101-
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
99+
{
100+
#if MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
101+
// Suppress compiler warning
102+
(void) gpio_irq_debounce_arr;
103+
104+
// Configure de-bounce clock source and sampling cycle time
105+
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
106+
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
102107
#else
103-
GPIO_DISABLE_DEBOUNCE(gpio_base, 1 << pin_index);
108+
// Enable de-bounce if the pin is in the de-bounce enable list
109+
110+
// De-bounce defaults to disabled.
111+
GPIO_DISABLE_DEBOUNCE(gpio_base, 1 << pin_index);
112+
113+
PinName *debounce_pos = gpio_irq_debounce_arr;
114+
PinName *debounce_end = gpio_irq_debounce_arr + sizeof (gpio_irq_debounce_arr) / sizeof (gpio_irq_debounce_arr[0]);
115+
for (; debounce_pos != debounce_end && *debounce_pos != NC; debounce_pos ++) {
116+
uint32_t pin_index_debunce = NU_PINNAME_TO_PIN(*debounce_pos);
117+
uint32_t port_index_debounce = NU_PINNAME_TO_PORT(*debounce_pos);
118+
119+
if (pin_index == pin_index_debunce &&
120+
port_index == port_index_debounce) {
121+
// Configure de-bounce clock source and sampling cycle time
122+
GPIO_SET_DEBOUNCE_TIME(MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
123+
GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
124+
break;
125+
}
126+
}
104127
#endif
128+
}
105129

106130
struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
107131

targets/TARGET_NUVOTON/TARGET_NUC472/mbed_lib.json

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,10 @@
55
"help": "Enable GPIO IRQ debounce",
66
"value": 0
77
},
8+
"gpio-irq-debounce-enable-list": {
9+
"help": "Comma separated pin list to enable GPIO IRQ debounce",
10+
"value": "NC"
11+
},
812
"gpio-irq-debounce-clock-source": {
913
"help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
1014
"value": "GPIO_DBCTL_DBCLKSRC_IRC10K"

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