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Merge pull request #3 from pan-/nrf52_port
Nrf52 port
2 parents bd2159d + 70ffeb6 commit e5b7579

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hal/targets.json

Lines changed: 32 additions & 1 deletion
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@@ -1734,5 +1734,36 @@
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"progen_target": "samg55j19",
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
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"default_build": "standard"
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},
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"MCU_NRF52": {
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"inherits": ["Target"],
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"core": "Cortex-M4F",
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"macros": ["NRF52", "TARGET_NRF52832"],
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"extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832"],
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"OUTPUT_EXT": "hex",
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"is_disk_virtual": true,
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"supported_toolchains": ["ARM", "GCC_ARM"],
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"public": false,
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"detect_code": ["1101"],
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"program_cycle_s": 6,
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"MERGE_SOFT_DEVICE": true,
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"EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
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{
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"boot": "",
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"name": "s132_nrf52_2.0.0_softdevice.hex",
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"offset": 114688
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}
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],
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"post_binary_hook": {
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"function": "MCU_NRF51Code.binary_hook",
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"toolchains": ["ARM_STD", "GCC_ARM"]
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},
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"MERGE_BOOTLOADER": false
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},
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"NRF52_DK": {
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"supported_form_factors": ["ARDUINO"],
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"inherits": ["MCU_NRF52"],
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"progen": {"target": "nrf52-dk"},
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"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
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}
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}
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}
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/*
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* Copyright (c) 2015 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* Linker script to configure memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x1C000, LENGTH = 0x64000
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RAM (rwx) : ORIGIN = 0x20002ef8, LENGTH = 0xd108
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}
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OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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/* Linker script to place sections and symbol values. Should be used together
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* with the other linker script that defines memory regions FLASH and RAM.
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* It references the following symbols that must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines the following symbols that the code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.Vectors))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(4);
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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. = ALIGN(4);
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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*(.jcr)
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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__edata = .;
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.fs_data :
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{
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PROVIDE(__start_fs_data = .);
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KEEP(*(.fs_data))
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PROVIDE(__stop_fs_data = .);
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} > RAM
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.bss :
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{
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. = ALIGN(4);
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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} > RAM
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.heap (NOLOAD):
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{
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__end__ = .;
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end = __end__;
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*(.heap*);
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/* Expand the heap to reach the stack boundary. */
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ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - 0x800), "heap region overflowed into stack");
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. += (ORIGIN(RAM) + LENGTH(RAM) - 0x800) - .;
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} > RAM
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PROVIDE(__heap_start = ADDR(.heap));
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PROVIDE(__heap_size = SIZEOF(.heap));
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PROVIDE(__mbed_sbrk_start = ADDR(.heap));
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PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap));
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/* .stack_dummy section does not contain any symbols. It is only
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* used for the linker script to calculate the size of stack sections
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* and assign values to stack symbols later. */
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.stack (NOLOAD):
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{
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__StackLimit = .;
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*(.stack*)
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. += (ORIGIN(RAM) + LENGTH(RAM) - .);
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} > RAM
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/* Set the stack top to the end of RAM and move down the stack limit by
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* the size of the stack_dummy section. */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - SIZEOF(.stack);
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PROVIDE(__stack = __StackTop);
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}

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