STM32L4+ : SRAM3 is powered off in Stop 2 mode

By default, SRAM3 content is then lost.

Author: jeromecoutant

targets/TARGET_STM/sleep.c

@@ -192,6 +192,10 @@ __WEAK void hal_deepsleep(void)
         HAL_PWREx_DisableLowPowerRunMode();
     }
 
+#if defined(PWR_CR1_RRSTP)
+    HAL_PWREx_EnableSRAM3ContentRetention();
+#endif
+
     HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI);
 
     if (lowPowerModeEnabled) {

targets/targets.json

@@ -3287,11 +3287,7 @@
         "device_has_add": [
             "USBDEVICE"
         ],
-        "device_name": "STM32L4R5ZI",
-        "mbed_rom_start": "0x08000000",
-        "mbed_rom_size": "0x200000",
-        "mbed_ram_start": "0x20000000",
-        "mbed_ram_size": "0x40000"
+        "device_name": "STM32L4R5ZITx"
     },
     "NUCLEO_L4R5ZI_P": {
         "inherits": [
@@ -3305,6 +3301,7 @@
         "inherits": [
             "MCU_STM32L4"
         ],
+        "device_name": "STM32L4R9AIIx",
         "supported_form_factors": [
             "ARDUINO",
             "STMOD",
@@ -3327,11 +3324,7 @@
         "device_has_add": [
             "QSPI",
             "USBDEVICE"
-        ],
-        "mbed_rom_start": "0x08000000",
-        "mbed_rom_size": "0x200000",
-        "mbed_ram_start": "0x20000000",
-        "mbed_ram_size": "0x40000"
+        ]
     },
     "MCU_STM32L5": {
         "inherits": [