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Add CC3220SF_Launchxl to Mbed OS
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‎components/storage/blockdevice/COMPONENT_SD/mbed_lib.json

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"SPI_MISO": "D12",
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"SPI_CLK": "D13",
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"SPI_CS": "D10"
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},
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"CC3220SF_LAUNCHXL": {
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"SPI_MOSI": "D11",
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"SPI_MISO": "D12",
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"SPI_CLK": "D13",
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"SPI_CS": "D10"
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}
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}
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}

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/PeripheralPins.h

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/* mbed Microcontroller Library
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* Copyright (c) 2006-2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALPINS_H
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#define MBED_PERIPHERALPINS_H
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#include "pinmap.h"
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#include "PeripheralNames.h"
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/************GPIO***************/
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extern const PinMap PinMap_GPIO[];
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/************PWM****************/
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extern const PinMap PinMap_PWM[];
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/************UART***************/
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extern const PinMap PinMap_UART_TX[];
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extern const PinMap PinMap_UART_RX[];
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extern const PinMap PinMap_UART_CTS[];
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extern const PinMap PinMap_UART_RTS[];
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#endif

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/PortNames.h

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/* mbed Microcontroller Library
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* Copyright (c) 2006-2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PORTNAMES_H
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#define MBED_PORTNAMES_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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Port0 = 0,
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Port1 = 1,
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Port2 = 2,
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Port3 = 3
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} PortName;
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#ifdef __cplusplus
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}
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#endif
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#endif

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/TARGET_CC3220SF_LAUNCHXL/CC3220SF_LAUNCHXL.c

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/*
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* Copyright (c) 2016-2018, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ======== CC3220SF_LAUNCHXL.c ========
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* This file is responsible for setting up the board specific items for the
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* CC3220SF_LAUNCHXL board.
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*/
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <ti/devices/cc32xx/inc/hw_ints.h>
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#include <ti/devices/cc32xx/inc/hw_memmap.h>
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#include <ti/devices/cc32xx/inc/hw_types.h>
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#include <ti/devices/cc32xx/driverlib/rom.h>
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#include <ti/devices/cc32xx/driverlib/rom_map.h>
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#include <ti/devices/cc32xx/driverlib/adc.h>
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#include <ti/devices/cc32xx/driverlib/gpio.h>
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#include <ti/devices/cc32xx/driverlib/pin.h>
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#include <ti/devices/cc32xx/driverlib/prcm.h>
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#include <ti/devices/cc32xx/driverlib/ti_spi_driverlib.h>
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#include <ti/devices/cc32xx/driverlib/sdhost.h>
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#include <ti/devices/cc32xx/driverlib/ti_timer.h>
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#include <ti/devices/cc32xx/driverlib/uart.h>
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#include <ti/devices/cc32xx/driverlib/udma.h>
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#include <ti/devices/cc32xx/driverlib/interrupt.h>
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#include <ti/devices/cc32xx/driverlib/wdt.h>
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#include <ti/drivers/Power.h>
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#include <ti/drivers/power/PowerCC32XX.h>
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#include "CC3220SF_LAUNCHXL.h"
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/*
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* =============================== Power ===============================
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*/
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/*
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* This table defines the parking state to be set for each parkable pin
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* during LPDS. (Device pins must be parked during LPDS to achieve maximum
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* power savings.) If the pin should be left unparked, specify the state
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* PowerCC32XX_DONT_PARK. For example, for a UART TX pin, the device
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* will automatically park the pin in a high state during transition to LPDS,
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* so the Power Manager does not need to explictly park the pin. So the
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* corresponding entries in this table should indicate PowerCC32XX_DONT_PARK.
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*/
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PowerCC32XX_ParkInfo parkInfo[] = {
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/* PIN PARK STATE PIN ALIAS (FUNCTION)
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----------------- ------------------------------ -------------------- */
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{PowerCC32XX_PIN01, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO10 */
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{PowerCC32XX_PIN02, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO11 */
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{PowerCC32XX_PIN03, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO12 */
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{PowerCC32XX_PIN04, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO13 */
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{PowerCC32XX_PIN05, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO14 */
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{PowerCC32XX_PIN06, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO15 */
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{PowerCC32XX_PIN07, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO16 */
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{PowerCC32XX_PIN08, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO17 */
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{PowerCC32XX_PIN13, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* FLASH_SPI_DIN */
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{PowerCC32XX_PIN15, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO22 */
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{PowerCC32XX_PIN16, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* TDI (JTAG DEBUG) */
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{PowerCC32XX_PIN17, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* TDO (JTAG DEBUG) */
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{PowerCC32XX_PIN19, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* TCK (JTAG DEBUG) */
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{PowerCC32XX_PIN20, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* TMS (JTAG DEBUG) */
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{PowerCC32XX_PIN18, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO28 */
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{PowerCC32XX_PIN21, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* SOP2 */
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{PowerCC32XX_PIN29, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* ANTSEL1 */
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{PowerCC32XX_PIN30, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* ANTSEL2 */
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{PowerCC32XX_PIN45, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* DCDC_ANA2_SW_P */
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{PowerCC32XX_PIN50, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO0 */
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{PowerCC32XX_PIN52, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* RTC_XTAL_N */
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{PowerCC32XX_PIN53, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO30 */
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{PowerCC32XX_PIN55, PowerCC32XX_WEAK_PULL_UP_STD}, /* GPIO1 (XDS_UART_RX) */
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{PowerCC32XX_PIN57, PowerCC32XX_WEAK_PULL_UP_STD}, /* GPIO2 (XDS_UART_TX) */
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{PowerCC32XX_PIN58, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO3 */
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{PowerCC32XX_PIN59, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO4 */
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{PowerCC32XX_PIN60, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO5 */
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{PowerCC32XX_PIN61, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO6 */
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{PowerCC32XX_PIN62, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO7 */
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{PowerCC32XX_PIN63, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO8 */
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{PowerCC32XX_PIN64, PowerCC32XX_WEAK_PULL_DOWN_STD}, /* GPIO9 */
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};
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/*
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* This structure defines the configuration for the Power Manager.
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*
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* In this configuration the Power policy is disabled by default (because
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* enablePolicy is set to false). The Power policy can be enabled dynamically
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* at runtime by calling Power_enablePolicy(), or at build time, by changing
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* enablePolicy to true in this structure.
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*/
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const PowerCC32XX_ConfigV1 PowerCC32XX_config = {
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.policyInitFxn = &PowerCC32XX_initPolicy,
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.policyFxn = &PowerCC32XX_sleepPolicy,
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.enterLPDSHookFxn = NULL,
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.resumeLPDSHookFxn = NULL,
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.enablePolicy = false,
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.enableGPIOWakeupLPDS = true,
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.enableGPIOWakeupShutdown = true,
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.enableNetworkWakeupLPDS = true,
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.wakeupGPIOSourceLPDS = PRCM_LPDS_GPIO13,
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.wakeupGPIOTypeLPDS = PRCM_LPDS_FALL_EDGE,
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.wakeupGPIOFxnLPDS = NULL,
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.wakeupGPIOFxnLPDSArg = 0,
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.wakeupGPIOSourceShutdown = PRCM_HIB_GPIO13,
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.wakeupGPIOTypeShutdown = PRCM_HIB_RISE_EDGE,
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.ramRetentionMaskLPDS = PRCM_SRAM_COL_1 | PRCM_SRAM_COL_2 |
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PRCM_SRAM_COL_3 | PRCM_SRAM_COL_4,
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.keepDebugActiveDuringLPDS = false,
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.ioRetentionShutdown = PRCM_IO_RET_GRP_1,
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.pinParkDefs = parkInfo,
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.numPins = sizeof(parkInfo) / sizeof(PowerCC32XX_ParkInfo)
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};
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/*
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* =============================== SPI ===============================
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*/
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#include <ti/drivers/ti_SPI.h>
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#include <ti/drivers/spi/SPICC32XXDMA.h>
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SPICC32XXDMA_Object spiCC3220SDMAObjects[CC3220SF_LAUNCHXL_SPICOUNT];
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#ifdef TOOLCHAIN_GCC_ARM
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__attribute__ ((aligned (32)))
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#elif defined TOOLCHAIN_ARM
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__attribute__ ((aligned (32)))
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#elif defined TOOLCHAIN_IAR
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#pragma data_alignment=32
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#endif
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uint32_t spiCC3220SDMAscratchBuf[CC3220SF_LAUNCHXL_SPICOUNT];
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const SPICC32XXDMA_HWAttrsV1 spiCC3220SDMAHWAttrs[CC3220SF_LAUNCHXL_SPICOUNT] = {
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/* index 0 is reserved for LSPI that links to the NWP */
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{
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.baseAddr = LSPI_BASE,
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.intNum = INT_LSPI,
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.intPriority = (~0),
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.spiPRCM = PRCM_LSPI,
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.csControl = SPI_SW_CTRL_CS,
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.csPolarity = SPI_CS_ACTIVEHIGH,
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.pinMode = SPI_4PIN_MODE,
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.turboMode = SPI_TURBO_OFF,
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.scratchBufPtr = &spiCC3220SDMAscratchBuf[CC3220SF_LAUNCHXL_SPI0],
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.defaultTxBufValue = 0,
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.rxChannelIndex = UDMA_CH12_LSPI_RX,
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.txChannelIndex = UDMA_CH13_LSPI_TX,
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.minDmaTransferSize = 100,
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.mosiPin = SPICC32XXDMA_PIN_NO_CONFIG,
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.misoPin = SPICC32XXDMA_PIN_NO_CONFIG,
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.clkPin = SPICC32XXDMA_PIN_NO_CONFIG,
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.csPin = SPICC32XXDMA_PIN_NO_CONFIG
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},
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{
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.baseAddr = GSPI_BASE,
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.intNum = INT_GSPI,
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.intPriority = (~0),
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.spiPRCM = PRCM_GSPI,
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.csControl = SPI_HW_CTRL_CS,
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.csPolarity = SPI_CS_ACTIVELOW,
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.pinMode = SPI_4PIN_MODE,
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.turboMode = SPI_TURBO_OFF,
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.scratchBufPtr = &spiCC3220SDMAscratchBuf[CC3220SF_LAUNCHXL_SPI1],
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.defaultTxBufValue = 0,
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.rxChannelIndex = UDMA_CH6_GSPI_RX,
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.txChannelIndex = UDMA_CH7_GSPI_TX,
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.minDmaTransferSize = 10,
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.mosiPin = SPICC32XXDMA_PIN_07_MOSI,
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.misoPin = SPICC32XXDMA_PIN_06_MISO,
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.clkPin = SPICC32XXDMA_PIN_05_CLK,
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.csPin = SPICC32XXDMA_PIN_08_CS
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}
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};
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const SPI_Config SPI_config[CC3220SF_LAUNCHXL_SPICOUNT] = {
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{
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.fxnTablePtr = &SPICC32XXDMA_fxnTable,
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.object = &spiCC3220SDMAObjects[CC3220SF_LAUNCHXL_SPI0],
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.hwAttrs = &spiCC3220SDMAHWAttrs[CC3220SF_LAUNCHXL_SPI0]
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},
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{
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.fxnTablePtr = &SPICC32XXDMA_fxnTable,
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.object = &spiCC3220SDMAObjects[CC3220SF_LAUNCHXL_SPI1],
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.hwAttrs = &spiCC3220SDMAHWAttrs[CC3220SF_LAUNCHXL_SPI1]
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}
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};
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const uint_least8_t SPI_count = CC3220SF_LAUNCHXL_SPICOUNT;
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/*
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* =============================== DMA ===============================
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*/
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#include <ti/drivers/dma/UDMACC32XX.h>
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#if defined(__TI_COMPILER_VERSION__)
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#pragma DATA_ALIGN(dmaControlTable, 1024)
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#elif defined(__IAR_SYSTEMS_ICC__)
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#pragma data_alignment=1024
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#elif defined(__GNUC__)
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__attribute__ ((aligned (1024)))
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#endif
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static tDMAControlTable dmaControlTable[64];
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/*
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* ======== dmaErrorFxn ========
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* This is the handler for the uDMA error interrupt.
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*/
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static void dmaErrorFxn(uintptr_t arg)
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{
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int status = MAP_uDMAErrorStatusGet();
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MAP_uDMAErrorStatusClear();
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/* Suppress unused variable warning */
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(void)status;
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while (1);
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}
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UDMACC32XX_Object udmaCC3220SObject;
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const UDMACC32XX_HWAttrs udmaCC3220SHWAttrs = {
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.controlBaseAddr = (void *)dmaControlTable,
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.dmaErrorFxn = (UDMACC32XX_ErrorFxn)dmaErrorFxn,
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.intNum = INT_UDMAERR,
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.intPriority = (~0)
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};
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const UDMACC32XX_Config UDMACC32XX_config = {
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.object = &udmaCC3220SObject,
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.hwAttrs = &udmaCC3220SHWAttrs
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};
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/*
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* =============================== General ===============================
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*/
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/*
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* ======== CC3220SF_LAUNCHXL_initGeneral ========
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*/
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void CC3220SF_LAUNCHXL_initGeneral(void)
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{
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MAP_IntMasterEnable();
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//MAP_IntEnable(FAULT_SYSTICK);
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PRCMCC3200MCUInit();
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//Power_init();
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}
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#if defined TOOLCHAIN_ARM
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__attribute__((section("signature_section")))
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#elif defined TOOLCHAIN_IAR
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#pragma default_variable_attributes = @ ".dbghdr"
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#elif defined TOOLCHAIN_GCC_ARM
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__attribute__ ((section (".dbghdr")))
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#endif
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const unsigned long ulDebugHeader[]=
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{
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0x5AA5A55A,
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0x000FF800,
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0xEFA3247D
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};

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